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    Searched defs:NumOps (Results 26 - 34 of 34) sorted by null

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  /external/llvm/lib/Target/X86/MCTargetDesc/
X86BaseInfo.h 617 unsigned NumOps = Desc.getNumOperands();
619 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
621 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
626 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
627 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
631 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
  /external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 396 unsigned NumOps = Call.getNode()->getNumOperands();
399 for (unsigned i = 1, e = NumOps; i != e; ++i)
    [all...]
X86FastISel.cpp     [all...]
X86InstrInfo.cpp     [all...]
X86ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 157 unsigned NumOps = MCID.getNumOperands();
161 const MachineOperand &Offset = MI->getOperand(NumOps-3);
165 unsigned OffImm = MI->getOperand(NumOps-2).getImm();
166 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(NumOps-1).getImm();
624 unsigned NumOps = MCID.getNumOperands();
626 MI->getOperand(NumOps - (MI->isPredicable() ? 3 : 2));
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp     [all...]
SelectionDAG.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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