| /external/pcre/dist/sljit/ |
| sljitNativePPC_32.c | 119 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| sljitNativePPC_64.c | 240 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 205 case ISD::ADDC: return "addc";
|
| LegalizeIntegerTypes.cpp | [all...] |
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding.txt | 244 # CHECK: addc 2, 3, 4
247 # CHECK: addc. 2, 3, 4
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb.td | [all...] |
| ARMISelLowering.h | 77 ADDC, // Add with carry
|
| ARMISelLowering.cpp | 580 setTargetDAGCombine(ISD::ADDC);
630 setOperationAction(ISD::ADDC, MVT::i32, Custom);
[all...] |
| /external/valgrind/main/none/tests/ppc64/ |
| jm-int.stdout.exp | 22 addc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
23 addc 0000000000000000, 0000001cbe991def => 0000001cbe991def (00000000 00000000)
24 addc 0000000000000000, ffffffffffffffff => ffffffffffffffff (00000000 00000000)
25 addc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)
26 addc 0000001cbe991def, 0000001cbe991def => 000000397d323bde (00000000 00000000)
27 addc 0000001cbe991def, ffffffffffffffff => 0000001cbe991dee (00000000 20000000)
28 addc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)
29 addc ffffffffffffffff, 0000001cbe991def => 0000001cbe991dee (00000000 20000000)
30 addc ffffffffffffffff, ffffffffffffffff => fffffffffffffffe (00000000 20000000)
251 addc. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000
[all...] |
| /external/antlr/antlr-3.4/runtime/C/src/ |
| antlr3commontoken.c | 582 outtext->addc (outtext, ']');
|
| antlr3string.c | 277 string->addc = addc8;
314 string->addc = addcUTF16;
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXVector.td | 320 def AddCCV4I32 : VecBinaryOp<V4AsmStr<"add.cc.s32">, addc, V4I32Regs,
322 def AddCCV2I32 : VecBinaryOp<V2AsmStr<"add.cc.s32">, addc, V2I32Regs,
328 def AddCCCV4I32 : VecBinaryOp<V4AsmStr<"addc.cc.s32">, adde, V4I32Regs,
330 def AddCCCV2I32 : VecBinaryOp<V2AsmStr<"addc.cc.s32">, adde, V2I32Regs,
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrAliases.td | 308 def : MnemonicAlias<"addc", "addx">, Requires<[HasV9]>;
|
| SparcInstrInfo.td | 517 defm ADDCC : F3_12<"addcc", 0b010000, addc, IntRegs, i32, simm13Op>;
520 defm ADDC : F3_12np<"addx", 0b001000>;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstr64Bit.td | 446 "addc", "$rT, $rA, $rB", IIC_IntGeneral,
447 [(set i64:$rT, (addc i64:$rA, i64:$rB))]>,
453 [(set i64:$rD, (addc i64:$rA, imm64SExt16:$imm))]>;
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 193 /// like ADDC/SUBC, which indicate the carry result is always false.
200 ADDC, SUBC,
[all...] |
| /external/skia/src/core/ |
| SkPath.cpp | 838 SkAutoDisableDirectionCheck addc(this);
[all...] |
| /external/valgrind/main/VEX/switchback/ |
| test_ppc_jm1.c | 728 __asm__ __volatile__ ("addc 17, 14, 15");
819 { &test_addc , " addc", },
852 __asm__ __volatile__ ("addc. 17, 14, 15");
923 { &test_addc_ , " addc.", },
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 382 // (addc multLo, Lo0), (adde multHi, Hi0),
389 // ADDENode's second operand must be a flag output of an ADDC node in order
393 if (ADDCNode->getOpcode() != ISD::ADDC)
439 // replace uses of adde and addc here
454 // (addc Lo0, multLo), (sube Hi0, multHi),
[all...] |
| Mips16InstrInfo.td | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 341 def addc : SDNode<"ISD::ADDC" , SDTIntBinOp,
[all...] |
| /external/opencv/cxcore/src/ |
| cxarithm.cpp | 244 ICV_DEF_UN_ARI_ALL( CV_ADD, AddC )
262 ICV_DEF_INIT_ARITHM_FUNC_TAB( AddC, C1R )
[all...] |
