| /external/llvm/test/CodeGen/PowerPC/ |
| Atomics-32.ll | 13 @sll = common global i64 0, align 8
14 @ull = common global i64 0, align 8
111 store i8 %0, i8* @sc, align 1
113 store i8 %1, i8* @uc, align 1
116 store i16 %3, i16* @ss, align 2
119 store i16 %5, i16* @us, align 2
122 store i32 %7, i32* @si, align 4
125 store i32 %9, i32* @ui, align 4
128 store i32 %11, i32* @sl, align 4
131 store i32 %13, i32* @ul, align
[all...] |
| 2008-10-31-PPCF128Libcalls.ll | 5 @a = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
6 @b = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
7 @c = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=3]
8 @d = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
12 %0 = load ppc_fp128* @a, align 16 ; <ppc_fp128> [#uses=1]
14 store ppc_fp128 %1, ppc_fp128* @a, align 16
15 %2 = load ppc_fp128* @b, align 16 ; <ppc_fp128> [#uses=1]
17 store ppc_fp128 %3, ppc_fp128* @b, align 16
18 %4 = load ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1]
20 store ppc_fp128 %5, ppc_fp128* @c, align 1
[all...] |
| resolvefi-basereg.ll | 14 @info = global %struct.Info zeroinitializer, align 8
15 @fails = global i32 0, align 4
16 @intarray = global [256 x i32] zeroinitializer, align 4
17 @s1998 = global %struct.S1998 zeroinitializer, align 16
22 %i = alloca i32, align 4
23 %j = alloca i32, align 4
24 %tmp = alloca i32, align 4
25 %agg.tmp = alloca %struct.S1998, align 16
26 %agg.tmp111 = alloca %struct.S1998, align 16
27 %agg.tmp112 = alloca %struct.S1998, align 1
[all...] |
| /external/clang/test/CodeGenObjC/ |
| objc-align.m | 4 // CHECK: @"\01L_OBJC_METACLASS_A" = private global {{.*}}, section "__OBJC,__meta_class,regular,no_dead_strip", align 4
5 // CHECK: @"\01L_OBJC_CLASS_A" = private global {{.*}}, section "__OBJC,__class,regular,no_dead_strip", align 4
6 // CHECK: @"\01L_OBJC_CATEGORY_A_Cat" = private global {{.*}}, section "__OBJC,__category,regular,no_dead_strip", align 4
7 // CHECK: @"\01L_OBJC_PROTOCOL_P" = private global {{.*}}, section "__OBJC,__protocol,regular,no_dead_strip", align 4
8 // CHECK: @"\01L_OBJC_CLASS_PROTOCOLS_C" = private global {{.*}}, section "__OBJC,__cat_cls_meth,regular,no_dead_strip", align 4
9 // CHECK: @"\01L_OBJC_METACLASS_C" = private global {{.*}}, section "__OBJC,__meta_class,regular,no_dead_strip", align 4
10 // CHECK: @"\01L_OBJC_CLASS_C" = private global {{.*}}, section "__OBJC,__class,regular,no_dead_strip", align 4
11 // CHECK: @"\01L_OBJC_MODULES" = private global {{.*}}, section "__OBJC,__module_info,regular,no_dead_strip", align 4
20 // RUNX: grep '@"\\01L_OBJC_CLASSLIST_REFERENCES_$_0" = private global .*, section "__DATA, __objc_classrefs, regular, no_dead_strip", align 8' %t &&
21 // RUNX: grep '@"\\01L_OBJC_LABEL_CATEGORY_$" = private global .*, section "__DATA, __objc_catlist, regular, no_dead_strip", align 8' %t &
[all...] |
| bitfield-ivar-offsets.m | 2 // RUN: grep -F '@"OBJC_IVAR_$_I0._b0" = global i64 0, section "__DATA, __objc_ivar", align 8' %t
3 // RUN: grep -F '@"OBJC_IVAR_$_I0._b1" = global i64 0, section "__DATA, __objc_ivar", align 8' %t
4 // RUN: grep -F '@"OBJC_IVAR_$_I0._b2" = global i64 1, section "__DATA, __objc_ivar", align 8' %t
5 // RUN: grep -F '@"OBJC_IVAR_$_I0._x" = global i64 2, section "__DATA, __objc_ivar", align 8' %t
6 // RUN: grep -F '@"OBJC_IVAR_$_I0._b3" = global i64 4, section "__DATA, __objc_ivar", align 8' %t
7 // RUN: grep -F '@"OBJC_IVAR_$_I0._y" = global i64 6, section "__DATA, __objc_ivar", align 8' %t
8 // RUN: grep -F '@"OBJC_IVAR_$_I0._b4" = global i64 7, section "__DATA, __objc_ivar", align 8' %t
|
| /external/llvm/test/CodeGen/Mips/ |
| fastcc.ll | 106 %0 = load i32* @gi0, align 4
107 %1 = load i32* @gi1, align 4
108 %2 = load i32* @gi2, align 4
109 %3 = load i32* @gi3, align 4
110 %4 = load i32* @gi4, align 4
111 %5 = load i32* @gi5, align 4
112 %6 = load i32* @gi6, align 4
113 %7 = load i32* @gi7, align 4
114 %8 = load i32* @gi8, align 4
115 %9 = load i32* @gi9, align
[all...] |
| spill-copy-acreg.ll | 3 @g1 = common global i64 0, align 8
4 @g2 = common global i64 0, align 8
5 @g3 = common global i64 0, align 8
9 %0 = load i64* @g1, align 8
12 store i64 %1, i64* @g1, align 8
13 store i64 %2, i64* @g2, align 8
15 store i64 %2, i64* @g3, align 8
23 @g4 = common global <2 x i16> zeroinitializer, align 4
24 @g5 = common global <2 x i16> zeroinitializer, align 4
25 @g6 = common global <2 x i16> zeroinitializer, align
[all...] |
| seleq.ll | 3 @t = global i32 10, align 4
4 @f = global i32 199, align 4
5 @a = global i32 1, align 4
6 @b = global i32 10, align 4
7 @c = global i32 1, align 4
8 @z1 = common global i32 0, align 4
9 @z2 = common global i32 0, align 4
10 @z3 = common global i32 0, align 4
11 @z4 = common global i32 0, align 4
15 %0 = load i32* @a, align
[all...] |
| selnek.ll | 3 @t = global i32 10, align 4
4 @f = global i32 199, align 4
5 @a = global i32 1, align 4
6 @b = global i32 1000, align 4
7 @z1 = common global i32 0, align 4
8 @z2 = common global i32 0, align 4
9 @z3 = common global i32 0, align 4
10 @z4 = common global i32 0, align 4
11 @.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
15 %0 = load i32* @a, align
[all...] |
| brcongt.ll | 3 @i = global i32 5, align 4
4 @j = global i32 10, align 4
5 @k = global i32 5, align 4
6 @result = global i32 0, align 4
10 %0 = load i32* @i, align 4
11 %1 = load i32* @j, align 4
18 store i32 1, i32* @result, align 4
|
| /external/llvm/test/CodeGen/NVPTX/ |
| noduplicate-syncthreads.ll | 12 %output.addr = alloca float*, align 8
13 store float* %output, float** %output.addr, align 8
14 %0 = load float** %output.addr, align 8
16 %1 = load float* %arrayidx, align 4
22 %2 = load float** %output.addr, align 8
23 %3 = load float* %2, align 4
27 store float %conv2, float* %2, align 4
31 %4 = load float** %output.addr, align 8
32 %5 = load float* %4, align 4
36 store float %conv5, float* %4, align
[all...] |
| /external/llvm/test/CodeGen/R600/ |
| parallelorifcollapse.ll | 17 %a0 = alloca i32, align 4
18 %b0 = alloca i32, align 4
19 %c0 = alloca i32, align 4
20 %d0 = alloca i32, align 4
21 %a1 = alloca i32, align 4
22 %b1 = alloca i32, align 4
23 %c1 = alloca i32, align 4
24 %d1 = alloca i32, align 4
25 %data = alloca i32, align 4
26 %0 = load i32* %a0, align
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2009-12-11-TLSNoRedZone.ll | 10 @data = global [2 x i64] zeroinitializer, align 64 ; <[2 x i64]*> [#uses=1]
11 @ptr = linkonce thread_local global [1 x i64] [i64 ptrtoint ([2 x i64]* @data to i64)], align 64 ; <[1 x i64]*> [#uses=1]
12 @link_ptr = linkonce thread_local global [1 x i64] zeroinitializer, align 64 ; <[1 x i64]*> [#uses=1]
13 @_dm_my_pe = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
14 @_dm_pes_in_prog = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
15 @_dm_npes_div_mult = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
16 @_dm_npes_div_shift = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
17 @_dm_pe_addr_loc = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
18 @_dm_offset_addr_mask = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
26 %p = alloca %test*, align 8 ; <%test**> [#uses=4
[all...] |
| /external/e2fsprogs/lib/ext2fs/ |
| inline.c | 45 unsigned long align, void *ptr)
50 if (align < 8)
51 align = 8;
53 retval = posix_memalign(p, align, size);
61 *p = memalign(align, size);
70 if (align > sizeof(long long))
75 if ((unsigned long) *p & (align - 1)) {
87 static int isaligned(void *ptr, unsigned long align)
89 return (((unsigned long) ptr & (align - 1)) == 0);
92 static errcode_t test_memalign(unsigned long align)
[all...] |
| /frameworks/base/docs/html/sdk/api_diff/12/changes/ |
| jdiff_statistics.html | 85 <TH ALIGN="center"><b>Additions</b></TH>
86 <TH ALIGN="center"><b>Changes</b></TH>
87 <TH ALIGN="center">Removals</TH>
88 <TH ALIGN="center"><b>Total</b></TH>
92 <TD ALIGN="right">3</TD>
93 <TD ALIGN="right">24</TD>
94 <TD ALIGN="right">0</TD>
95 <TD ALIGN="right">27</TD>
99 <TD ALIGN="right">5</TD>
100 <TD ALIGN="right">65</TD
[all...] |
| /external/clang/test/CodeGen/ |
| string-literal.c | 15 // CHECK-C: private unnamed_addr constant [10 x i8] c"abc\00\00\00\00\00\00\00", align 1
16 // CHECK-C11: private unnamed_addr constant [10 x i8] c"abc\00\00\00\00\00\00\00", align 1
17 // CHECK-CXX11: private unnamed_addr constant [10 x i8] c"abc\00\00\00\00\00\00\00", align 1
21 // CHECK-C: private unnamed_addr constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1
22 // CHECK-C11: private unnamed_addr constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1
23 // CHECK-CXX11: private unnamed_addr constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1
26 // CHECK-C: private unnamed_addr constant [3 x i32] [i32 65, i32 66, i32 0], align 4
27 // CHECK-C11: private unnamed_addr constant [3 x i32] [i32 65, i32 66, i32 0], align 4
28 // CHECK-CXX11: private unnamed_addr constant [3 x i32] [i32 65, i32 66, i32 0], align 4
31 // CHECK-C: private unnamed_addr constant [3 x i32] [i32 4660, i32 1110027, i32 0], align
[all...] |
| volatile-2.c | 6 // CHECK-NEXT: [[REAL:%.*]] = load volatile float* getelementptr inbounds ({ float, float }* @test0_v, i32 0, i32 0), align 4
7 // CHECK-NEXT: load volatile float* getelementptr inbounds ({{.*}} @test0_v, i32 0, i32 1), align 4
8 // CHECK-NEXT: store float [[REAL]], float* [[F]], align 4
16 // CHECK: [[REAL:%.*]] = load volatile float* getelementptr inbounds ({{.*}} @test1_v, i32 0, i32 0), align 4
17 // CHECK-NEXT: [[IMAG:%.*]] = load volatile float* getelementptr inbounds ({{.*}} @test1_v, i32 0, i32 1), align 4
18 // CHECK-NEXT: store volatile float [[REAL]], float* getelementptr inbounds ({{.*}} @test1_v, i32 0, i32 0), align 4
19 // CHECK-NEXT: store volatile float [[IMAG]], float* getelementptr inbounds ({{.*}} @test1_v, i32 0, i32 1), align 4
|
| /external/llvm/test/CodeGen/XCore/ |
| scavenging.ll | 19 %x = alloca [100 x i32], align 4 ; <[100 x i32]*> [#uses=2]
20 %0 = load i32* @size, align 4 ; <i32> [#uses=1]
21 %1 = alloca i32, i32 %0, align 4 ; <i32*> [#uses=1]
22 %2 = load volatile i32* @g0, align 4 ; <i32> [#uses=1]
23 %3 = load volatile i32* @g1, align 4 ; <i32> [#uses=1]
24 %4 = load volatile i32* @g2, align 4 ; <i32> [#uses=1]
25 %5 = load volatile i32* @g3, align 4 ; <i32> [#uses=1]
26 %6 = load volatile i32* @g4, align 4 ; <i32> [#uses=1]
27 %7 = load volatile i32* @g5, align 4 ; <i32> [#uses=1]
28 %8 = load volatile i32* @g6, align 4 ; <i32> [#uses=1
[all...] |
| atomic.ll | 26 %0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4
33 %1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2
37 %2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1
41 %3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4
45 %4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2
49 %5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1
53 store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
57 store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
61 store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
66 store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vshr.ll | 9 %a.addr = alloca <8 x i16>, align 16
10 %b.addr = alloca <8 x i16>, align 16
11 store <8 x i16> %a, <8 x i16>* %a.addr, align 16
12 store <8 x i16> %b, <8 x i16>* %b.addr, align 16
13 %0 = load <8 x i16>* %a.addr, align 16
14 %1 = load <8 x i16>* %b.addr, align 16
24 %a.addr = alloca <4 x i32>, align 32
25 %b.addr = alloca <4 x i32>, align 32
26 store <4 x i32> %a, <4 x i32>* %a.addr, align 32
27 store <4 x i32> %b, <4 x i32>* %b.addr, align 3
[all...] |
| global-merge-4.ll | 6 @bar = internal global [5 x i32] zeroinitializer, align 4
7 @baz = internal global [5 x i32] zeroinitializer, align 4
8 @foo = internal global [5 x i32] zeroinitializer, align 4
13 store i32 %1, i32* getelementptr inbounds ([5 x i32]* @bar, i64 0, i64 0), align 4
15 store i32 %2, i32* getelementptr inbounds ([5 x i32]* @baz, i64 0, i64 0), align 4
17 store i32 %3, i32* getelementptr inbounds ([5 x i32]* @bar, i64 0, i64 1), align 4
19 store i32 %4, i32* getelementptr inbounds ([5 x i32]* @baz, i64 0, i64 1), align 4
21 store i32 %5, i32* getelementptr inbounds ([5 x i32]* @bar, i64 0, i64 2), align 4
23 store i32 %6, i32* getelementptr inbounds ([5 x i32]* @baz, i64 0, i64 2), align 4
25 store i32 %7, i32* getelementptr inbounds ([5 x i32]* @bar, i64 0, i64 3), align
[all...] |
| /external/qemu/distrib/sdl-1.2.15/docs/html/ |
| sdlgetappstate.html | 39 ALIGN="center"
45 ALIGN="left"
54 ALIGN="center"
59 ALIGN="right"
69 ALIGN="LEFT"
140 ALIGN="LEFT"
147 ALIGN="LEFT"
153 ALIGN="LEFT"
160 ALIGN="LEFT"
166 ALIGN="LEFT
[all...] |
| /external/clang/test/Sema/ |
| pragma-pack-and-options-align.c | 12 #pragma options align=natural
19 #pragma options align=reset
20 #pragma options align=native
42 #pragma options align=power
48 #pragma options align=reset
51 /* expected-warning {{#pragma options align=reset failed: stack empty}} */ #pragma options align=reset
|
| /external/llvm/test/CodeGen/Hexagon/ |
| gp-rel.ll | 4 @a = common global i32 0, align 4
5 @b = common global i32 0, align 4
6 @c = common global i32 0, align 4
13 %0 = load i32* @a, align 4
14 %1 = load i32* @b, align 4
20 %.pre = load i32* @c, align 4
25 store i32 %add1, i32* @c, align 4
|
| newvaluejump.ll | 4 @i = global i32 0, align 4
5 @j = global i32 10, align 4
10 %addr1 = alloca i32, align 4
11 %addr2 = alloca i32, align 4
12 %0 = load i32* @i, align 4
13 store i32 %0, i32* %addr1, align 4
15 %1 = load i32* @j, align 4
|
