/external/llvm/test/CodeGen/XCore/ |
globals.ll | 5 ; CHECK-LABEL: addr_G1: 6 ; CHECK: ldaw r0, dp[G1] 12 ; CHECK-LABEL: addr_G2: 13 ; CHECK: ldaw r0, dp[G2] 19 ; CHECK-LABEL: addr_G3: 20 ; CHECK: ldaw r0, dp[G3] 26 ; CHECK-LABEL: addr_iG3: 27 ; CHECK: ldaw r11, cp[iG3] 28 ; CHECK: mov r0, r11 34 ; CHECK-LABEL: addr_G4 [all...] |
/external/llvm/test/MC/ELF/ |
relax-arith.s | 7 // CHECK: Name: imul 8 // CHECK: SectionData ( 9 // CHECK-NEXT: 0000: 6669DB00 0066691C 25000000 00000069 10 // CHECK-NEXT: 0010: DB000000 00691C25 00000000 00000000 11 // CHECK-NEXT: 0020: 4869DB00 00000048 691C2500 00000000 12 // CHECK-NEXT: 0030: 000000 13 // CHECK-NEXT: ) 23 // CHECK: Name: and 24 // CHECK: SectionData ( 25 // CHECK-NEXT: 0000: 6681E300 00668124 25000000 0000008 [all...] |
debug-line2.s | 6 // CHECK: Section { 7 // CHECK: Name: .debug_line 8 // CHECK-NEXT: Type: SHT_PROGBITS 9 // CHECK-NEXT: Flags [ 10 // CHECK-NEXT: ] 11 // CHECK-NEXT: Address: 0x0 12 // CHECK-NEXT: Offset: 13 // CHECK-NEXT: Size: 56 14 // CHECK-NEXT: Link: 0 15 // CHECK-NEXT: Info: [all...] |
weak.s | 12 // CHECK: Symbol { 13 // CHECK: Name: bar 14 // CHECK-NEXT: Value: 0x4 15 // CHECK-NEXT: Size: 0 16 // CHECK-NEXT: Binding: Weak 17 // CHECK-NEXT: Type: None 18 // CHECK-NEXT: Other: 0 19 // CHECK-NEXT: Section: .text 20 // CHECK-NEXT: } 21 // CHECK: Symbol [all...] |
/external/clang/test/CodeGen/ |
builtin-attributes.c | 4 // CHECK: declare i32 @printf(i8*, ...) 9 // CHECK: call void @exit 10 // CHECK: unreachable 15 // CHECK: call i8* @strstr{{.*}} [[NUW:#[0-9]+]] 23 // CHECK: f3 24 // CHECK: call double @frexp(double % 25 // CHECK-NOT: readnone 26 // CHECK: call float @frexpf(float % 27 // CHECK-NOT: readnone 28 // CHECK: call double @frexpl(double [all...] |
ext-vector.c | 8 // CHECK: @foo = global <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00> 11 // CHECK: @bar = constant <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 0x7FF0000000000000> 14 // CHECK: @test1 15 // CHECK: fadd <4 x float> 24 // CHECK: @test2 25 // CHECK: shufflevector {{.*}} <i32 0, i32 1> 26 // CHECK: extractelement 27 // CHECK: shufflevector {{.*}} <i32 1, i32 1, i32 1, i32 1> 28 // CHECK: insertelement 29 // CHECK: shufflevector {{.*}} <i32 1, i32 0 [all...] |
fp16-ops.c | 10 // CHECK-LABEL: define void @foo() 12 // Check unary ops 14 // CHECK: call float @llvm.convert.from.fp16 15 // CHECK fptoi float 17 // CHECK: call float @llvm.convert.from.fp16 18 // CHECK: fcmp une float 20 // CHECK: call float @llvm.convert.from.fp16 21 // CHECK: fsub float 22 // CHECK: call i16 @llvm.convert.to.fp16 24 // CHECK: call float @llvm.convert.from.fp1 [all...] |
/external/clang/test/Layout/ |
ms-x86-empty-nonvirtual-bases.cpp | 25 // CHECK: *** Dumping AST Record Layout 26 // CHECK: *** Dumping AST Record Layout 27 // CHECK-NEXT: 0 | struct A 28 // CHECK-NEXT: 0 | struct B0 (base) (empty) 29 // CHECK-NEXT: 0 | int a 30 // CHECK-NEXT: | [sizeof=8, align=8 31 // CHECK-NEXT: | nvsize=8, nvalign=8] 39 // CHECK: *** Dumping AST Record Layout 40 // CHECK-NEXT: 0 | struct B 41 // CHECK-NEXT: 0 | struct B0 (base) (empty [all...] |
/external/llvm/test/Instrumentation/AddressSanitizer/ |
stack-poisoning.ll | 1 ; RUN: opt < %s -asan -asan-module -asan-use-after-return -S | FileCheck --check-prefix=CHECK-UAR %s 2 ; RUN: opt < %s -asan -asan-module -asan-use-after-return=0 -S | FileCheck --check-prefix=CHECK-PLAIN %s 10 ; CHECK-PLAIN-LABEL: Bar 11 ; CHECK-PLAIN-NOT: label 12 ; CHECK-PLAIN: ret void 14 ; CHECK-UAR-LABEL: Bar 15 ; CHECK-UAR: load i32* @__asan_option_detect_stack_use_after_return 16 ; CHECK-UAR: labe [all...] |
/external/llvm/test/MC/MachO/ARM/ |
thumb2-movw-fixup.s | 20 @ CHECK: ('_relocations', [ 21 @ CHECK: # Relocation 0 22 @ CHECK: (('word-0', 0xc), 23 @ CHECK: ('word-1', 0x86000002)), 24 @ CHECK: # Relocation 1 25 @ CHECK: (('word-0', 0x1184), 26 @ CHECK: ('word-1', 0x16ffffff)), 27 @ CHECK: # Relocation 2 28 @ CHECK: (('word-0', 0x8), 29 @ CHECK: ('word-1', 0x84000002)) [all...] |
/external/llvm/test/CodeGen/X86/ |
frameaddr.ll | 1 ; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 2 ; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-32 3 ; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 4 ; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-64 8 ; CHECK-32-LABEL: test1 9 ; CHECK-32: pus [all...] |
dllexport.ll | 2 ; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-CL %s 4 ; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-GCC %s 6 ; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-GCC % [all...] |
wide-fma-contraction.ll | 2 ; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA 4 ; CHECK-LABEL: fmafunc 5 ; CHECK-NOFMA-LABEL: fmafunc 8 ; CHECK-NOT: vmulps 9 ; CHECK-NOT: vaddps 10 ; CHECK: vfmaddps 11 ; CHECK-NOT: vmulps 12 ; CHECK-NOT: vaddps 13 ; CHECK: vfmaddp [all...] |
atomic128.ll | 6 ; CHECK-LABEL: val_compare_and_swap: 7 ; CHECK: movq %rsi, %rax 8 ; CHECK: movq %rcx, %rbx 9 ; CHECK: movq %r8, %rcx 10 ; CHECK: lock 11 ; CHECK: cmpxchg16b (%rdi) 19 ; CHECK-LABEL: fetch_and_nand: 20 ; CHECK-DAG: movq %rdx, [[INCHI:%[a-z0-9]+]] 21 ; CHECK-DAG: movq (%rdi), %rax 22 ; CHECK-DAG: movq 8(%rdi), %rd [all...] |
/external/clang/test/Analysis/ |
dtors-in-dtor-cfg-output.cpp | 37 // CHECK: [B2 (ENTRY)] 38 // CHECK: Succs (1): B1 39 // CHECK: [B1] 40 // CHECK: 1: this->a.~A() (Member object destructor) 41 // CHECK: 2: ~B() (Base object destructor) 42 // CHECK: 3: ~C() (Base object destructor) 43 // CHECK: 4: ~A() (Base object destructor) 44 // CHECK: Preds (1): B2 45 // CHECK: Succs (1): B0 46 // CHECK: [B0 (EXIT) [all...] |
/external/clang/test/CodeGenObjC/ |
arc-related-result-type.m | 9 // CHECK-LABEL: define void @test0( 10 // CHECK: [[VAL:%.*]] = alloca [[TEST0:%.*]]* 11 // CHECK-NEXT: [[X:%.*]] = alloca [[TEST0]]* 12 // CHECK-NEXT: store [[TEST0]]* null 13 // CHECK-NEXT: bitcast 14 // CHECK-NEXT: bitcast 15 // CHECK-NEXT: call void @objc_storeStrong( 16 // CHECK-NEXT: load [[TEST0]]** [[VAL]], 17 // CHECK-NEXT: load 18 // CHECK-NEXT: bitcas [all...] |
/external/clang/test/Driver/ |
gcc_forward.c | 0 // Check that we don't try to forward -Xclang or -mlinker-version to GCC. 2 // PR12920 -- Check also we may not forward W_Group options to GCC. 13 // CHECK: "-Wall" "-Wdocumentation" 14 // CHECK: "-o" "{{[^"]+}}.s" 17 // CHECK: as{{[^"]*}}" 18 // CHECK: "-o" "{{[^"]+}}.o" 21 // CHECK: gcc{{[^"]*}}" 22 // CHECK-NOT: "-mlinker-version=10" 23 // CHECK-NOT: "-Xclang" 24 // CHECK-NOT: "foo-bar [all...] |
/external/llvm/test/Bindings/llvm-c/ |
disassemble.test | 5 ;CHECK: triple: arm-linux-android 6 ;CHECK: ldr r2, [pc, #-1604] 7 ;CHECK: sub r1, r11, #12 8 ;CHECK: 02 20 81 e0 9 ;CHECK: add r2, r1, r2 12 ;CHECK: triple: x86_64-linux-unknown 13 ;CHECK: addq $56, %rsp 14 ;CHECK: popq %rbx 15 ;CHECK: popq %rbp 16 ;CHECK: popq %r1 [all...] |
/external/llvm/test/CodeGen/SystemZ/ |
and-04.ll | 7 ; CHECK-LABEL: f1: 8 ; CHECK: risbg %r2, %r2, 63, 191, 0 9 ; CHECK: br %r14 16 ; CHECK-LABEL: f2: 17 ; CHECK: risbg %r2, %r2, 48, 190, 0 18 ; CHECK: br %r14 25 ; CHECK-LABEL: f3: 26 ; CHECK: llghr %r2, %r3 27 ; CHECK: br %r14 32 ; Check the next value up, which can again use RISBG [all...] |
atomicrmw-nand-01.ll | 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK 4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 5 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 7 ; Check NAND of a variable. 8 ; - CHECK is for the main loop. 9 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second 11 ; tested in CHECK [all...] |
atomicrmw-nand-02.ll | 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK 4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 5 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 7 ; Check NAND of a variable. 8 ; - CHECK is for the main loop. 9 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second 11 ; tested in CHECK [all...] |
/external/llvm/test/MC/ARM/ |
directive-eabi_attribute.s | 4 @ CHECK: Name: .ARM.attribute 5 @ CHECK: SectionData ( 8 @ CHECK: 41 11 @ CHECK: 250000 00 14 @ CHECK: 616561 626900 17 @ CHECK: 01 20 @ CHECK: 1B000000 25 @ CHECK: 060A 28 @ CHECK: 0741 31 @ CHECK: 080 [all...] |
/external/llvm/test/MC/MachO/ |
loc.s | 7 // CHECK: # Section 1 8 // CHECK-NEXT: (('section_name', '__debug_line\x00\x00\x00\x00') 9 // CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') 10 // CHECK-NEXT: ('address', 1) 11 // CHECK-NEXT: ('size', 51) 12 // CHECK-NEXT: ('offset', 221) 13 // CHECK-NEXT: ('alignment', 0) 14 // CHECK-NEXT: ('reloc_offset', 272) 15 // CHECK-NEXT: ('num_reloc', 1) 16 // CHECK-NEXT: ('flags', 0x2000000 [all...] |
/external/llvm/test/MC/AArch64/ |
arm64-elf-relocs.s | 2 // RUN: llvm-mc -triple=arm64-linux-gnu -filetype=obj < %s | llvm-objdump -triple=arm64-linux-gnu - -r | FileCheck %s --check-prefix=CHECK-OBJ 5 // CHECK: add x0, x2, :lo12:sym 6 // CHECK-OBJ: 0 R_AARCH64_ADD_ABS_LO12_NC sym 9 // CHECK: add x5, x7, :dtprel_lo12:sym 10 // CHECK-OBJ: 4 R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym 13 // CHECK: add x9, x12, :dtprel_lo12_nc:sym 14 // CHECK-OBJ: 8 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym 17 // CHECK: add x20, x30, :tprel_lo12:sym 18 // CHECK-OBJ: c R_AARCH64_TLSLE_ADD_TPREL_LO12 sy [all...] |
/external/llvm/test/MC/Disassembler/ARM/ |
invalid-armv8.txt | 6 # RUN: llvm-mc -triple armv7 -show-encoding -disassemble %s | FileCheck %s --check-prefix=CHECK-V7 9 # CHECK-V7: cdp 10 # CHECK: invalid instruction encoding 11 # CHECK-NEXT: [0x00 0x01 0x00 0xee] 14 # CHECK-V7: cdp 15 # CHECK: invalid instruction encoding 16 # CHECK-NEXT: [0x00 0x0e 0x00 0xee] 19 # CHECK-V7: cdp 20 # CHECK: invalid instruction encodin [all...] |