| /external/llvm/test/MC/Mips/ |
| nacl-mask.s | 21 # CHECK-LABEL: test1:
23 # CHECK: and $4, $4, $14
24 # CHECK-NEXT: jr $4
26 # Check that additional nop is inserted, to align mask and jr to the next
29 # CHECK-NEXT: nop
30 # CHECK-NEXT: nop
32 # CHECK: and $ra, $ra, $14
33 # CHECK-NEXT: jr $ra
58 # CHECK-LABEL: test2:
60 # CHECK: and $1, $1, $1
[all...] |
| /external/clang/test/Layout/ |
| ms-x86-vtordisp.cpp | 4 // RUN: | FileCheck %s -check-prefix CHECK-X64
32 // CHECK: *** Dumping AST Record Layout
33 // CHECK: *** Dumping AST Record Layout
34 // CHECK: *** Dumping AST Record Layout
35 // CHECK-NEXT: 0 | struct A
36 // CHECK-NEXT: 0 | (A vftable pointer)
37 // CHECK-NEXT: 4 | (A vbtable pointer)
38 // CHECK-NEXT: 8 | int a
39 // CHECK-NEXT: 16 | (vtordisp for vbase B0
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| arm-tests.txt | 3 # CHECK: addpl r4, pc, #318767104
6 # CHECK: b #0
9 # CHECK: bl #7732
12 # CHECK: bleq #-4
15 # CHECK: bfc r8, #0, #16
18 # CHECK: bfi r8, r0, #16, #1
21 # CHECK: mov pc, lr
24 # CHECK: mov pc, #3221225535
27 # CHECK: movw r7, #4096
30 # CHECK: cmn r0, #
[all...] |
| /external/clang/test/CodeGenCXX/ |
| captured-statements.cpp | 2 // RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-1
3 // RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-2
4 // RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-3
5 // RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-4
6 // RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-
[all...] |
| 2009-05-04-PureConstNounwind.cpp | 6 // CHECK: define i32 @_Z1fv() [[TF:#[0-9]+]] {
8 // CHECK: call i32 @_Z1cv() [[NUW_RN_CALL:#[0-9]+]]
9 // CHECK: call i32 @_Z1pv() [[NUW_RO_CALL:#[0-9]+]]
13 // CHECK: declare i32 @_Z1cv() [[NUW_RN:#[0-9]+]]
14 // CHECK: declare i32 @_Z1pv() [[NUW_RO:#[0-9]+]]
15 // CHECK: declare i32 @_Z1tv() [[TF]]
17 // CHECK: attributes [[TF]] = { {{.*}} }
18 // CHECK: attributes [[NUW_RN]] = { nounwind readnone{{.*}} }
19 // CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} }
20 // CHECK: attributes [[NUW_RN_CALL]] = { nounwind readnone
[all...] |
| inheriting-constructor.cpp | 14 // CHECK-LABEL: define void @_ZN1BD2Ev
15 // CHECK-LABEL: define void @_ZN1BD1Ev
16 // CHECK-LABEL: define void @_ZN1BD0Ev
18 // CHECK-LABEL: define linkonce_odr void @_ZN1BC1Ei(
19 // CHECK: call void @_ZN1BC2Ei(
21 // CHECK-LABEL: define linkonce_odr void @_ZN1DC1IiEET_(
22 // CHECK: call void @_ZN1DC2IiEET_(
24 // CHECK-LABEL: define linkonce_odr void @_ZN1DC2IiEET_(
25 // CHECK: call void @_ZN1CC2IiEET_(
27 // CHECK-LABEL: define linkonce_odr void @_ZN1BC2Ei
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-tls-dynamics.ll | 2 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
7 ; CHECK-LABEL: test_generaldynamic:
13 ; CHECK: adrp [[TLSDESC_HI:x[0-9]+]], :tlsdesc:general_dynamic_var
14 ; CHECK: add x0, [[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var
15 ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:general_dynamic_var
16 ; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var]
17 ; CHECK: .tlsdesccall general_dynamic_var
18 ; CHECK-NEXT: blr [[CALLEE]]
20 ; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL
[all...] |
| arm64-returnaddr.ll | 5 ; CHECK-LABEL: rt0:
6 ; CHECK: mov x0, x30
7 ; CHECK: ret
14 ; CHECK-LABEL: rt2:
15 ; CHECK: stp x29, x30, [sp, #-16]!
16 ; CHECK: mov x29, sp
17 ; CHECK: ldr x[[REG:[0-9]+]], [x29]
18 ; CHECK: ldr x[[REG2:[0-9]+]], [x[[REG]]]
19 ; CHECK: ldr x0, [x[[REG2]], #8]
20 ; CHECK: ldp x29, x30, [sp], #1
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| eh-return64.ll | 1 ; RUN: llc -march=mips64el -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
2 ; RUN: llc -march=mips64el -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
3 ; RUN: llc -march=mips64el -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
4 ; RUN: llc -march=mips64el -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=R
[all...] |
| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| basic.ll | 9 ; CHECK: @test_load
10 ; CHECK-NOT: load
11 ; CHECK: %[[LOAD_ADDR:[^ ]*]] = ptrtoint i32* %a to i64
12 ; CHECK: lshr i64 %[[LOAD_ADDR]], 3
13 ; CHECK: {{or|add}}
14 ; CHECK: %[[LOAD_SHADOW_PTR:[^ ]*]] = inttoptr
15 ; CHECK: %[[LOAD_SHADOW:[^ ]*]] = load i8* %[[LOAD_SHADOW_PTR]]
16 ; CHECK: icmp ne i8
17 ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
20 ; CHECK: and i64 %[[LOAD_ADDR]],
[all...] |
| /external/clang/test/CodeGen/ |
| big-atomic-ops.c | 18 // CHECK: @fi1
19 // CHECK: load atomic i32* {{.*}} seq_cst
24 // CHECK: @fi1a
25 // CHECK: load atomic i32* {{.*}} seq_cst
32 // CHECK: @fi1b
33 // CHECK: load atomic i32* {{.*}} seq_cst
38 // CHECK: @fi2
39 // CHECK: store atomic i32 {{.*}} seq_cst
44 // CHECK: @fi2a
45 // CHECK: store atomic i32 {{.*}} seq_cs
[all...] |
| count-builtins.c | 9 // CHECK: @test_i16
10 // CHECK: call i16 @llvm.ctlz.i16
11 // CHECK: call i16 @llvm.cttz.i16
19 // CHECK: @test_i32
20 // CHECK: call i32 @llvm.ctlz.i32
21 // CHECK: call i32 @llvm.cttz.i32
22 // CHECK: call i32 @llvm.ctpop.i32
29 // CHECK: @test_i64
30 // CHECK: call i64 @llvm.ctlz.i64
31 // CHECK: call i64 @llvm.cttz.i6
[all...] |
| debug-info-gline-tables-only.c | 5 // CHECK-NOT: DW_TAG_variable
8 // CHECK-NOT: DW_TAG_typedef
9 // CHECK-NOT: DW_TAG_const_type
10 // CHECK-NOT: DW_TAG_pointer_type
11 // CHECK-NOT: DW_TAG_array_type
14 // CHECK-NOT: DW_TAG_structure_type
16 // CHECK-NOT: DW_TAG_member
22 // CHECK-NOT: DW_TAG_enumerator
23 // CHECK-NOT: DW_TAG_enumeration_type
26 // CHECK-NOT: DW_TAG_arg_variabl
[all...] |
| microsoft-call-conv-x64.c | 6 // CHECK-LABEL: define void @f4()
8 // CHECK: call void @f1()
11 // CHECK-LABEL: define void @f5()
13 // CHECK: call void @f2()
24 // CHECK: call void @f4()
25 // CHECK: call void @f5()
27 // CHECK: call void %{{.*}}()
28 // CHECK: call void %{{.*}}()
29 // CHECK: call void %{{.*}}()
30 // CHECK: call void %{{.*}}(
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| int-cmp-13.ll | 5 ; Check comparisons with 0.
7 ; CHECK-LABEL: f1:
8 ; CHECK: cgije %r2, 0
9 ; CHECK: ldr %f0, %f2
10 ; CHECK: br %r14
16 ; Check the high end of the CGIJ range.
18 ; CHECK-LABEL: f2:
19 ; CHECK: cgije %r2, 127
20 ; CHECK: ldr %f0, %f2
21 ; CHECK: br %r1
[all...] |
| int-cmp-14.ll | 5 ; Check comparisons with 0.
7 ; CHECK-LABEL: f1:
8 ; CHECK: cgijlh %r2, 0
9 ; CHECK: ldr %f0, %f2
10 ; CHECK: br %r14
16 ; Check the high end of the CGIJ range.
18 ; CHECK-LABEL: f2:
19 ; CHECK: cgijlh %r2, 127
20 ; CHECK: ldr %f0, %f2
21 ; CHECK: br %r1
[all...] |
| fp-const-01.ll | 7 ; CHECK-LABEL: f1:
8 ; CHECK: lzer %f0
9 ; CHECK: br %r14
15 ; CHECK-LABEL: f2:
16 ; CHECK: lzdr %f0
17 ; CHECK: br %r14
23 ; CHECK-LABEL: f3:
24 ; CHECK: lzxr %f0
25 ; CHECK: std %f0, 0(%r2)
26 ; CHECK: std %f2, 8(%r2
[all...] |
| /external/clang/test/CodeGenObjC/ |
| assign.m | 13 // Check that we get exactly the message sends we expect, and no more.
15 // CHECK-LABEL: define void @f0
17 // CHECK: objc_msgSend
20 // CHECK: objc_msgSend
23 // CHECK: objc_msgSend
26 // CHECK: objc_msgSend
27 // CHECK: objc_msgSend
30 // CHECK: objc_msgSend
31 // CHECK: objc_msgSend
34 // CHECK-NOT: objc_msgSen
[all...] |
| /external/clang/test/Rewriter/ |
| unnamed-bf-modern-write.mm | 17 // CHECK: struct Foo__T_1 {
18 // CHECK-NEXT: int : 1;
19 // CHECK-NEXT: int third : 1;
20 // CHECK-NEXT: int : 1;
21 // CHECK-NEXT: int fifth : 1;
22 // CHECK-NEXT: char : 0;
23 // CHECK-NEXT: } ;
24 // CHECK: struct Foo_IMPL {
25 // CHECK-NEXT: int first;
26 // CHECK-NEXT: struct Foo__T_1 Foo__GRBF_1
[all...] |
| /external/compiler-rt/lib/tsan/ |
| check_analyze.sh | 22 check() { function
31 check $f rsp 3
32 check $f push 1
33 check $f pop 5
37 check $f rsp 3
38 check $f push 1
39 check $f pop 4
43 check $f rsp 0
44 check $f push 0
45 check $f pop
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| tail-call.ll | 1 ; RUN: llc -mtriple armv7 -O0 -o - < %s | FileCheck %s -check-prefix CHECK-TAIL
3 ; RUN: | FileCheck %s -check-prefix CHECK-NO-TAIL
13 ; CHECK-TAIL-LABEL: caller
14 ; CHECK-TAIL: b callee
16 ; CHECK-NO-TAIL-LABEL: caller
17 ; CHECK-NO-TAIL: push {lr}
18 ; CHECK-NO-TAIL: bl callee
19 ; CHECK-NO-TAIL: pop {lr
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| i1-to-double.ll | 7 ; CHECK-LABEL: @test
9 ; CHECK: andi. {{[0-9]+}}, 3, 1
10 ; CHECK: bc 12, 1,
12 ; CHECK: li 3, .LCP[[L1:[A-Z0-9_]+]]@l
13 ; CHECK: addis 3, 3, .LCP[[L1]]@ha
14 ; CHECK: lfs 1, 0(3)
15 ; CHECK: blr
17 ; CHECK: li 3, .LCP[[L2:[A-Z0-9_]+]]@l
18 ; CHECK: addis 3, 3, .LCP[[L2]]@ha
19 ; CHECK: lfs 1, 0(3
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2010-01-08-Atomic64Bug.ll | 9 ; CHECK-LABEL: t:
10 ; CHECK: movl ([[REG:%[a-z]+]]), %eax
11 ; CHECK: movl 4([[REG]]), %edx
12 ; CHECK: LBB0_1:
13 ; CHECK: movl %eax, %ebx
14 ; CHECK: addl $1, %ebx
15 ; CHECK: movl %edx, %ecx
16 ; CHECK: adcl $0, %ecx
17 ; CHECK: lock
18 ; CHECK-NEXT: cmpxchg8b ([[REG]]
[all...] |
| /external/llvm/test/MC/ELF/ |
| got.s | 9 // CHECK: Relocations [
10 // CHECK: Section ({{[^ ]+}}) .rela.text {
11 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOT32 foo 0x{{[^ ]+}}
12 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOTPCREL foo 0x{{[^ ]+}}
13 // CHECK-NEXT: }
14 // CHECK-NEXT: ]
16 // CHECK: Symbol {
17 // CHECK: Name: _GLOBAL_OFFSET_TABLE_
18 // CHECK-NEXT: Value:
19 // CHECK-NEXT: Size
[all...] |
| /external/llvm/test/MC/MachO/ |
| x86_64-reloc-arithmetic.s | 10 // CHECK: ('_relocations', [
11 // CHECK-NEXT: # Relocation 0
12 // CHECK-NEXT: (('word-0', 0x103),
13 // CHECK-NEXT: ('word-1', 0x1d000001))
15 // CHECK: # Symbol 1
16 // CHECK-NEXT: (('n_strx', 6)
17 // CHECK-NEXT: ('n_type', 0xe)
18 // CHECK-NEXT: ('n_sect', 1)
19 // CHECK-NEXT: ('n_desc', 0)
20 // CHECK-NEXT: ('n_value', 258
[all...] |
