| /external/llvm/test/CodeGen/ARM/ |
| vcvt-v8.ll | 130 declare <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float>) nounwind readnone
131 declare <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
132 declare <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float>) nounwind readnone
133 declare <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
134 declare <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float>) nounwind readnone
135 declare <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
136 declare <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float>) nounwind readnone
137 declare <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
138 declare <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float>) nounwind readnone
139 declare <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float>) nounwind readnon
[all...] |
| vpadd.ll | 39 declare <8 x i8> @llvm.arm.neon.vpadd.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
40 declare <4 x i16> @llvm.arm.neon.vpadd.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
41 declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
43 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
166 declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone
167 declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone
168 declare <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32>) nounwind readnone
170 declare <4 x i16> @llvm.arm.neon.vpaddlu.v4i16.v8i8(<8 x i8>) nounwind readnone
171 declare <2 x i32> @llvm.arm.neon.vpaddlu.v2i32.v4i16(<4 x i16>) nounwind readnone
172 declare <1 x i64> @llvm.arm.neon.vpaddlu.v1i64.v2i32(<2 x i32>) nounwind readnon
[all...] |
| vqadd.ll | 147 declare <8 x i8> @llvm.arm.neon.vqadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
148 declare <4 x i16> @llvm.arm.neon.vqadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
149 declare <2 x i32> @llvm.arm.neon.vqadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
150 declare <1 x i64> @llvm.arm.neon.vqadds.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
152 declare <8 x i8> @llvm.arm.neon.vqaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
153 declare <4 x i16> @llvm.arm.neon.vqaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
154 declare <2 x i32> @llvm.arm.neon.vqaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
155 declare <1 x i64> @llvm.arm.neon.vqaddu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
157 declare <16 x i8> @llvm.arm.neon.vqadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
158 declare <8 x i16> @llvm.arm.neon.vqadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| vqsub.ll | 147 declare <8 x i8> @llvm.arm.neon.vqsubs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
148 declare <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
149 declare <2 x i32> @llvm.arm.neon.vqsubs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
150 declare <1 x i64> @llvm.arm.neon.vqsubs.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
152 declare <8 x i8> @llvm.arm.neon.vqsubu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
153 declare <4 x i16> @llvm.arm.neon.vqsubu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
154 declare <2 x i32> @llvm.arm.neon.vqsubu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
155 declare <1 x i64> @llvm.arm.neon.vqsubu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
157 declare <16 x i8> @llvm.arm.neon.vqsubs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
158 declare <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/CPP/ |
| 2009-05-01-Long-Double.ll | 13 declare i32 @other_func(...)
|
| /external/llvm/test/CodeGen/Generic/ |
| 2002-04-16-StackFrameSizeAlignment.ll | 6 declare i32 @SIM(i8*, i8*, i32, i32, i32, [256 x i32]*, i32, i32, i32)
|
| 2007-05-03-EHTypeInfo.ll | 12 declare i32 @llvm.eh.typeid.for.i32(i8*)
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| 2007-12-17-InvokeAsm.ll | 17 declare i32 @__gxx_personality_v0(...)
|
| 2008-02-25-NegateZero.ll | 14 declare void @foo(i32, ...)
|
| annotate.ll | 15 declare i32 @llvm.annotation.i32(i32, i8*, i8*, i32) #1
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| print-int.ll | 5 declare i32 @printf(i8*, ...)
|
| /external/llvm/test/CodeGen/Hexagon/ |
| args.ll | 14 declare void @bar(i32, i32, i32, i32, i32, i32, i32)
|
| misaligned-access.ll | 4 declare i32 @_hi(i64) #1
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| opt-fabs.ll | 15 declare float @fabsf(float)
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| struct_args_large.ll | 16 declare void @bar(%struct.large* byval)
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| vaddh.ll | 16 declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone
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| /external/llvm/test/CodeGen/Mips/ |
| 2008-08-06-Alloca.ll | 15 declare i32 @foo(i8*)
|
| 2012-12-12-ExpandMemcpy.ll | 11 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
|
| cprestore.ll | 20 declare void @foo1(%struct.S* byval)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2006-10-13-Miscompile.ll | 15 declare i32 @bar(...)
|
| 2007-02-23-lr-saved-twice.ll | 14 declare i32 @printf(i8*, ...)
|
| 2007-03-24-cntlzd.ll | 12 declare i64 @llvm.ctlz.i64(i64, i1)
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| calls.ll | 10 declare void @foo()
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| func-addr.ll | 7 declare i32 @bar(i8*)
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| pr3711_widen_bit.ll | 18 declare void @abort() noreturn nounwind
|
