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/external/llvm/test/DebugInfo/COFF/
asan-module-without-functions.ll	29 declare void @__asan_init_v3() 31 declare void @__asan_before_dynamic_init(i32) 33 declare void @__asan_after_dynamic_init() 35 declare void @__asan_register_globals(i32, i32) 37 declare void @__asan_unregister_globals(i32, i32)
/external/llvm/test/Transforms/DeadStoreElimination/
libcalls.ll	3 declare i8* @strcpy(i8* %dest, i8* %src) nounwind 14 declare i8* @strncpy(i8* %dest, i8* %src, i32 %n) nounwind 25 declare i8* @strcat(i8* %dest, i8* %src) nounwind 36 declare i8* @strncat(i8* %dest, i8* %src, i32 %n) nounwind 58 declare void @user(i8* %p)
/external/llvm/test/Transforms/InstCombine/
double-float-shrink-1.ll	328 declare double @tanh(double) nounwind readnone 329 declare double @tan(double) nounwind readnone 330 declare double @sqrt(double) nounwind readnone 331 declare double @sin(double) nounwind readnone 332 declare double @log2(double) nounwind readnone 333 declare double @log1p(double) nounwind readnone 334 declare double @log10(double) nounwind readnone 335 declare double @log(double) nounwind readnone 336 declare double @logb(double) nounwind readnone 337 declare double @exp10(double) nounwind readnon     [all...]
/external/llvm/test/CodeGen/AArch64/
func-calls.ll	19 declare void @take_i8s(i8 %val1, i8 %val2) 20 declare void @take_floats(float %val1, float %val2) 43 declare i32 @return_int() 44 declare double @return_double() 45 declare [2 x i64] @return_smallstruct() 46 declare void @return_large_struct(%myStruct* sret %retval) 76 declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45, 79 declare void @stacked_fpu(float %var0, double %var1, float %var2, float %var3, 118 declare void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3, 122 declare void @check_i128_regalign(i32 %val0, i128 %val1     [all...]
arm64-st1.ll	111 declare void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8>, <16 x i8>, i64, i8*) nounwind readnone 112 declare void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16>, <8 x i16>, i64, i16*) nounwind readnone 113 declare void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32>, <4 x i32>, i64, i32*) nounwind readnone 114 declare void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64>, <2 x i64>, i64, i64*) nounwind readnone 144 declare void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone 145 declare void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) nounwind readnone 146 declare void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i64, i32*) nounwind readnone 147 declare void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64, i64*) nounwind readnone 177 declare void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone 178 declare void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) (…)     [all...]
arm64-fmuladd.ll	82 declare float @llvm.fmuladd.f32(float, float, float) nounwind readnone 83 declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone 84 declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone 85 declare <8 x float> @llvm.fmuladd.v8f32(<8 x float>, <8 x float>, <8 x float>) nounwind readnone 86 declare double @llvm.fmuladd.f64(double, double, double) nounwind readnone 87 declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone 88 declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
arm64-vcvt_f.ll	57 declare <2 x double> @llvm.aarch64.neon.vcvthighfp2df(<4 x float>) nounwind readnone 58 declare <2 x double> @llvm.aarch64.neon.vcvtfp2df(<2 x float>) nounwind readnone 60 declare <2 x float> @llvm.aarch64.neon.vcvtdf2fp(<2 x double>) nounwind readnone 61 declare <4 x float> @llvm.aarch64.neon.vcvthighdf2fp(<2 x float>, <2 x double>) nounwind readnone 63 declare <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double>) nounwind readnone 81 declare float @llvm.convert.from.fp16(i16) #1 82 declare i16 @llvm.convert.to.fp16(float) #1
/external/llvm/test/CodeGen/ARM/
2010-07-26-GlobalMerge.ll	20 declare i32 @printf(i8* nocapture, ...) nounwind 22 declare i8* @__cxa_allocate_exception(i32) 24 declare i32 @__gxx_personality_sj0(...) 26 declare i32 @llvm.eh.typeid.for(i8*) nounwind 28 declare void @_Unwind_SjLj_Resume(i8*) 41 declare void @__cxa_throw(i8*, i8*, i8*) 88 declare i8* @__cxa_get_exception_ptr(i8*) 90 declare i8* @__cxa_begin_catch(i8*) 92 declare void @__cxa_end_catch() 94 declare i32 @puts(i8* nocapture) nounwin     [all...]
vqshl.ll	339 declare <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 340 declare <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 341 declare <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 342 declare <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone 344 declare <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 345 declare <4 x i16> @llvm.arm.neon.vqshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 346 declare <2 x i32> @llvm.arm.neon.vqshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 347 declare <1 x i64> @llvm.arm.neon.vqshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone 349 declare <8 x i8> @llvm.arm.neon.vqshiftsu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 350 declare <4 x i16> @llvm.arm.neon.vqshiftsu.v4i16(<4 x i16>, <4 x i16>) nounwind readnon     [all...]
vst1.ll	120 declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind 121 declare void @llvm.arm.neon.vst1.v4i16(i8*, <4 x i16>, i32) nounwind 122 declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>, i32) nounwind 123 declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>, i32) nounwind 124 declare void @llvm.arm.neon.vst1.v1i64(i8*, <1 x i64>, i32) nounwind 126 declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>, i32) nounwind 127 declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind 128 declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>, i32) nounwind 129 declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind 130 declare void @llvm.arm.neon.vst1.v2i64(i8*, <2 x i64>, i32) nounwin     [all...]
popcnt.ll	74 declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>) nounwind readnone 75 declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) nounwind readnone 76 declare <4 x i16> @llvm.ctpop.v4i16(<4 x i16>) nounwind readnone 77 declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>) nounwind readnone 78 declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone 79 declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>) nounwind readnone 129 declare <8 x i8> @llvm.ctlz.v8i8(<8 x i8>, i1) nounwind readnone 130 declare <4 x i16> @llvm.ctlz.v4i16(<4 x i16>, i1) nounwind readnone 131 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone 133 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) nounwind readnon     [all...]
debug-frame-no-debug.ll	31 declare void @_Z5printiiiii(i32, i32, i32, i32, i32) 33 declare void @_Z5printddddd(double, double, double, double, double) 78 declare void @__clang_call_terminate(i8*) 80 declare i32 @__gxx_personality_v0(...) 82 declare i8* @__cxa_begin_catch(i8*) 84 declare void @__cxa_end_catch() 86 declare void @_ZSt9terminatev()
vminmax.ll	129 declare <8 x i8> @llvm.arm.neon.vmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 130 declare <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 131 declare <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 133 declare <8 x i8> @llvm.arm.neon.vminu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 134 declare <4 x i16> @llvm.arm.neon.vminu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 135 declare <2 x i32> @llvm.arm.neon.vminu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 137 declare <2 x float> @llvm.arm.neon.vmins.v2f32(<2 x float>, <2 x float>) nounwind readnone 139 declare <16 x i8> @llvm.arm.neon.vmins.v16i8(<16 x i8>, <16 x i8>) nounwind readnone 140 declare <8 x i16> @llvm.arm.neon.vmins.v8i16(<8 x i16>, <8 x i16>) nounwind readnone 141 declare <4 x i32> @llvm.arm.neon.vmins.v4i32(<4 x i32>, <4 x i32>) nounwind readnon     [all...]
/frameworks/rs/driver/runtime/arch/
x86_sse2.ll	4 declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) 5 declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) 6 declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) 7 declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) 9 declare float @llvm.sqrt.f32(float) nounwind readnone 10 declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) nounwind readnone 11 declare <3 x float> @llvm.sqrt.v3f32(<3 x float>) nounwind readnone 12 declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind readnone 14 declare float @llvm.exp.f32(float) nounwind readonly 15 declare float @llvm.pow.f32(float, float) nounwind readonl     [all...]
/external/openssl/
import_openssl.sh	39 declare -r message=$1 46 declare -r message=$1 84 declare -r command=$1 87 declare -r tar=$1 91 declare -r patch=$1 97 declare -r patch=$1 99 declare -r tar=$1 170 declare -r pattern=$1 264 declare -r cflags=$(filter_by_egrep "^-D" $(grep -e "^CFLAG=" $tmpfile)) 265 declare -r depflags=$(filter_by_egrep "^-D" $(grep -e "^DEPFLAG=" $tmpfile)     [all...]
/external/llvm/test/CodeGen/X86/
avx512-gather-scatter-intrin.ll	3 declare <16 x float> @llvm.x86.avx512.gather.dps.512 (<16 x float>, i8*, <16 x i32>, i16, i32) 4 declare void @llvm.x86.avx512.scatter.dps.512 (i8*, i16, <16 x i32>, <16 x float>, i32) 5 declare <8 x double> @llvm.x86.avx512.gather.dpd.512 (<8 x double>, i8*, <8 x i32>, i8, i32) 6 declare void @llvm.x86.avx512.scatter.dpd.512 (i8*, i8, <8 x i32>, <8 x double>, i32) 8 declare <8 x float> @llvm.x86.avx512.gather.qps.512 (<8 x float>, i8*, <8 x i64>, i8, i32) 9 declare void @llvm.x86.avx512.scatter.qps.512 (i8*, i8, <8 x i64>, <8 x float>, i32) 10 declare <8 x double> @llvm.x86.avx512.gather.qpd.512 (<8 x double>, i8*, <8 x i64>, i8, i32) 11 declare void @llvm.x86.avx512.scatter.qpd.512 (i8*, i8, <8 x i64>, <8 x double>, i32) 67 declare <16 x i32> @llvm.x86.avx512.gather.dpi.512 (<16 x i32>, i8*, <16 x i32>, i16, i32) 68 declare void @llvm.x86.avx512.scatter.dpi.512 (i8*, i16, <16 x i32>, <16 x i32>, i32     [all...]
bool-simplify.ll	132 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone 133 declare { i16, i32 } @llvm.x86.rdrand.16() nounwind 134 declare { i32, i32 } @llvm.x86.rdrand.32() nounwind 135 declare { i64, i32 } @llvm.x86.rdrand.64() nounwind 136 declare { i16, i32 } @llvm.x86.rdseed.16() nounwind 137 declare { i32, i32 } @llvm.x86.rdseed.32() nounwind 138 declare { i64, i32 } @llvm.x86.rdseed.64() nounwind
/external/llvm/test/Analysis/BasicAA/
modref.ll	4 declare void @llvm.lifetime.end(i64, i8* nocapture) 6 declare void @external(i32*) 133 declare void @test7decl(i32* nocapture %x) 148 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind 149 declare void @llvm.memset.p0i8.i8(i8* nocapture, i8, i8, i32, i1) nounwind 150 declare void @llvm.memcpy.p0i8.p0i8.i8(i8* nocapture, i8* nocapture, i8, i32, i1) nounwind 151 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
/external/llvm/test/CodeGen/Mips/
mips16ex.ll	77 declare i32 @printf(i8*, ...) 79 declare i8* @__cxa_allocate_exception(i32) 81 declare i32 @__gxx_personality_v0(...) 83 declare void @__cxa_throw(i8*, i8*, i8*) 85 declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone 87 declare i8* @__cxa_begin_catch(i8*) 89 declare void @__cxa_end_catch()
/external/llvm/test/CodeGen/Mips/msa/
bit.ll	17 declare <16 x i8> @llvm.mips.sat.s.b(<16 x i8>, i32) nounwind 36 declare <8 x i16> @llvm.mips.sat.s.h(<8 x i16>, i32) nounwind 55 declare <4 x i32> @llvm.mips.sat.s.w(<4 x i32>, i32) nounwind 74 declare <2 x i64> @llvm.mips.sat.s.d(<2 x i64>, i32) nounwind 93 declare <16 x i8> @llvm.mips.sat.u.b(<16 x i8>, i32) nounwind 112 declare <8 x i16> @llvm.mips.sat.u.h(<8 x i16>, i32) nounwind 131 declare <4 x i32> @llvm.mips.sat.u.w(<4 x i32>, i32) nounwind 150 declare <2 x i64> @llvm.mips.sat.u.d(<2 x i64>, i32) nounwind 169 declare <16 x i8> @llvm.mips.slli.b(<16 x i8>, i32) nounwind 188 declare <8 x i16> @llvm.mips.slli.h(<8 x i16>, i32) nounwin     [all...]
/external/llvm/test/CodeGen/PowerPC/
fast-isel-call.ll	50 declare signext i16 @t5(); 51 declare zeroext i16 @t6(); 52 declare signext i8 @t7(); 53 declare zeroext i8 @t8(); 74 declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) 96 declare void @float_foo(float %f) ssp 115 declare void @double_foo(double %d) ssp
/external/llvm/test/CodeGen/SPARC/
exception.ll	136 declare i8* @__cxa_allocate_exception(i32) #1 139 declare void @__cxa_throw(i8*, i8*, void (i8*)*) #2 141 declare void @__cxa_end_catch() 144 declare i32 @llvm.eh.typeid.for(i8*) #3 147 declare i8* @__cxa_begin_catch(i8*) #1 150 declare i32 @puts(i8* nocapture readonly) #1 152 declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*)
/external/llvm/test/CodeGen/XCore/
exception.ll	3 declare void @g() 4 declare i32 @__gxx_personality_v0(...) 5 declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone 6 declare i8* @__cxa_begin_catch(i8*) 7 declare void @__cxa_end_catch() 8 declare i8* @__cxa_allocate_exception(i32) 9 declare void @__cxa_throw(i8*, i8*, i8*)
/external/llvm/test/Instrumentation/MemorySanitizer/
vector_shift.ll	8 declare x86_mmx @llvm.x86.mmx.psll.d(x86_mmx, x86_mmx) 9 declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>) 10 declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>) 11 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) 12 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) 13 declare <2 x i64> @llvm.x86.sse2.psll.dq(<2 x i64>, i32) 14 declare <2 x i64> @llvm.x86.sse2.psll.dq.bs(<2 x i64>, i32)
/external/llvm/test/Transforms/Mem2Reg/
ConvertDebugInfo2.ll	3 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone 5 declare void @foo(i32, i64, i8*) 14 call void @llvm.dbg.declare(metadata !{i32* %a_addr}, metadata !0), !dbg !7 17 call void @llvm.dbg.declare(metadata !{i32* %x_addr.i}, metadata !9) nounwind, !dbg !15 19 call void @llvm.dbg.declare(metadata !{i64* %y_addr.i}, metadata !16) nounwind, !dbg !15 21 call void @llvm.dbg.declare(metadata !{i8** %z_addr.i}, metadata !17) nounwind, !dbg !15

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