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<<61626364656667686970>>
/external/llvm/test/CodeGen/Generic/ |
invalid-memcpy.ll | 17 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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ptr-annotate.ll | 18 declare i8* @llvm.ptr.annotation.p0i8(i8*, i8*, i8*, i32) #1
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/external/llvm/test/CodeGen/Hexagon/ |
combine.ll | 17 declare i64 @llvm.hexagon.A2.combinew(i32, i32) nounwind readnone
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struct_args.ll | 16 declare void @bar(i64)
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union-1.ll | 19 declare void @bar(i64)
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/external/llvm/test/CodeGen/MSP430/ |
2009-11-05-8BitLibcalls.ll | 22 declare i16 @bar(i8*)
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/external/llvm/test/CodeGen/Mips/ |
2008-08-08-bswap.ll | 15 declare i32 @llvm.bswap.i32(i32) nounwind readnone
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and1.ll | 17 declare i32 @printf(i8*, ...)
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ctlz-v.ll | 4 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
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global-pointer-reg.ll | 24 declare void @foo2(i32*)
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gpreg-lazy-binding.ll | 18 declare void @externalFunc()
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lb1.ll | 18 declare i32 @printf(i8*, ...)
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lh1.ll | 18 declare i32 @printf(i8*, ...)
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lhu1.ll | 19 declare i32 @printf(i8*, ...)
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memcpy.ll | 18 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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mipslopat.ll | 18 declare void @llvm.prefetch(i8* nocapture, i32, i32, i32) nounwind
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neg1.ll | 15 declare i32 @printf(i8*, ...)
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not1.ll | 16 declare i32 @printf(i8*, ...)
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or1.ll | 17 declare i32 @printf(i8*, ...)
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sra1.ll | 15 declare i32 @printf(i8*, ...)
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/external/llvm/test/CodeGen/Mips/msa/ |
2rf_fq.ll | 18 declare <4 x float> @llvm.mips.ffql.w(<8 x i16>) nounwind 37 declare <2 x double> @llvm.mips.ffql.d(<4 x i32>) nounwind 56 declare <4 x float> @llvm.mips.ffqr.w(<8 x i16>) nounwind 75 declare <2 x double> @llvm.mips.ffqr.d(<4 x i32>) nounwind
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i10.ll | 20 declare i32 @llvm.mips.bnz.b(<16 x i8>) nounwind 41 declare i32 @llvm.mips.bnz.h(<8 x i16>) nounwind 62 declare i32 @llvm.mips.bnz.w(<4 x i32>) nounwind 83 declare i32 @llvm.mips.bnz.d(<2 x i64>) nounwind
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i5-a.ll | 18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind 37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind 56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind 75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
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i5-m.ll | 18 declare <16 x i8> @llvm.mips.maxi.s.b(<16 x i8>, i32) nounwind 37 declare <8 x i16> @llvm.mips.maxi.s.h(<8 x i16>, i32) nounwind 56 declare <4 x i32> @llvm.mips.maxi.s.w(<4 x i32>, i32) nounwind 75 declare <2 x i64> @llvm.mips.maxi.s.d(<2 x i64>, i32) nounwind 94 declare <16 x i8> @llvm.mips.maxi.u.b(<16 x i8>, i32) nounwind 113 declare <8 x i16> @llvm.mips.maxi.u.h(<8 x i16>, i32) nounwind 132 declare <4 x i32> @llvm.mips.maxi.u.w(<4 x i32>, i32) nounwind 151 declare <2 x i64> @llvm.mips.maxi.u.d(<2 x i64>, i32) nounwind 170 declare <16 x i8> @llvm.mips.mini.s.b(<16 x i8>, i32) nounwind 189 declare <8 x i16> @llvm.mips.mini.s.h(<8 x i16>, i32) nounwin [all...] |
i5-s.ll | 18 declare <16 x i8> @llvm.mips.subvi.b(<16 x i8>, i32) nounwind 37 declare <8 x i16> @llvm.mips.subvi.h(<8 x i16>, i32) nounwind 56 declare <4 x i32> @llvm.mips.subvi.w(<4 x i32>, i32) nounwind 75 declare <2 x i64> @llvm.mips.subvi.d(<2 x i64>, i32) nounwind
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