| /external/llvm/test/CodeGen/Mips/ |
| sra2.ll | 17 declare i32 @printf(i8*, ...)
|
| srl1.ll | 18 declare i32 @printf(i8*, ...)
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| sub1.ll | 15 declare i32 @printf(i8*, ...)
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| sub2.ll | 17 declare i32 @printf(i8*, ...)
|
| tail16.ll | 16 declare float @g(...)
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| xor1.ll | 17 declare i32 @printf(i8*, ...)
|
| /external/llvm/test/CodeGen/NVPTX/ |
| surf-write.ll | 5 declare void @llvm.nvvm.sust.b.1d.i32.trap(i64, i32, i32)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2006-10-17-brcc-miscompile.ll | 19 declare i32 @bar(...)
|
| 2007-05-22-tailmerge-3.ll | 61 declare i32 @bar(...)
63 declare i32 @baz(...)
65 declare i32 @foo(...)
67 declare i32 @quux(...)
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| 2007-09-07-LoadStoreIdxForms.ll | 20 declare i32 @bork(...)
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| 2008-03-05-RegScavengerAssert.ll | 3 declare i8* @bar(i32)
|
| 2008-07-24-PPC64-CCBug.ll | 11 declare i32 @printf(i8*, ...) nounwind
|
| 2008-12-02-LegalizeTypeAssert.ll | 18 declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) nounwind readnone
|
| 2012-10-11-dynalloc.ll | 13 declare void @use(i8*, i8*)
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| and-branch.ll | 16 declare i32 @bar(...)
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| byval-agg-info.ll | 7 declare void @foo(%struct.anon* %v)
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| fp-branch.ll | 3 declare i1 @llvm.isunordered.f64(double, double)
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| frounds.ll | 19 declare i32 @llvm.flt.rounds() nounwind
|
| named-reg-alloc-r0.ll | 13 declare i32 @llvm.read_register.i32(metadata) nounwind
|
| named-reg-alloc-r1-64.ll | 16 declare i64 @llvm.read_register.i64(metadata) nounwind
|
| named-reg-alloc-r13-64.ll | 16 declare i64 @llvm.read_register.i64(metadata) nounwind
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| named-reg-alloc-r13.ll | 16 declare i32 @llvm.read_register.i32(metadata) nounwind
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| named-reg-alloc-r2-64.ll | 15 declare i64 @llvm.read_register.i64(metadata) nounwind
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| named-reg-alloc-r2.ll | 16 declare i32 @llvm.read_register.i32(metadata) nounwind
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| ppc32-i1-vaarg.ll | 5 declare void @printf(i8*, ...)
|
