| /external/llvm/test/CodeGen/ARM/ |
| 2012-03-05-FPSCR-bug.ll | 36 declare i32 @llvm.flt.rounds() nounwind
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| 2013-01-21-PR14992.ll | 24 declare void @bar(i32*) optsize
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| 2013-04-21-AAPCS-VA-C.1.cp.ll | 27 declare i32 @printf(i8* nocapture, ...)
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| 2013-05-31-char-shift-crash.ll | 21 declare arm_aapcscc void @f1(i8 signext) #1
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| 2013-10-11-select-stalls.ll | 16 declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* , i32 )
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| arm-abi-attr.ll | 28 declare void @f(i8*)
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| arm-returnaddr.ll | 28 declare i8* @llvm.returnaddress(i32) nounwind readnone
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| bswap16.ll | 42 declare i16 @llvm.bswap.i16(i16)
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| crash-shufflevector.ll | 3 declare void @g(<16 x i8>)
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| debug-info-sreg2.ll | 40 declare float @_Z3barv() optsize
42 declare float @_Z2f2v() optsize
44 declare float @_Z2f3f(float) optsize
46 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
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| fabss.ll | 14 declare float @fabsf(float)
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| fast-isel-deadcode.ll | 22 declare void @printArgsNoRet(i32 %a1, float %a2, i8 signext %a3, double %a4)
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| hello.ll | 17 declare i32 @puts(i8*)
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| hints.ll | 5 declare void @llvm.arm.hint(i32) nounwind
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| ifconv-kills.ll | 3 declare i32 @f(i32 %p0, i32 %p1)
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| optselect-regclass.ll | 24 declare void @__sprintf_chk(i8*, i32, i32, i8*, ...)
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| readcyclecounter.ll | 10 declare i64 @llvm.readcyclecounter()
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| stm.ll | 6 declare i32 @printf(i8* nocapture, ...) nounwind
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| swift-vldm.ll | 11 declare fastcc void @force_register(double %d0, double %d1, double %d2, double %d3, double %d4)
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| uint64tof64.ll | 17 declare i32 @fprintf(%struct.FILE*, i8*, ...)
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| vargs.ll | 12 declare i32 @printf(i8*, ...)
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| vminmaxnm.ll | 85 declare <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
86 declare <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
87 declare <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
88 declare <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
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| vsra.ll | 323 declare <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
324 declare <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
325 declare <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
326 declare <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
328 declare <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
329 declare <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
330 declare <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
331 declare <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
333 declare <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
334 declare <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/ARM/Windows/ |
| mov32t-bundling.ll | 6 declare arm_aapcs_vfpcc void @force_emission()
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| /external/llvm/test/CodeGen/Generic/ |
| 2003-07-07-BadLongConst.ll | 5 declare i32 @printf(i8*, ...)
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