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  /external/llvm/test/CodeGen/Mips/msa/
3rf_q.ll 20 declare <8 x i16> @llvm.mips.mul.q.h(<8 x i16>, <8 x i16>) nounwind
42 declare <4 x i32> @llvm.mips.mul.q.w(<4 x i32>, <4 x i32>) nounwind
64 declare <8 x i16> @llvm.mips.mulr.q.h(<8 x i16>, <8 x i16>) nounwind
86 declare <4 x i32> @llvm.mips.mulr.q.w(<4 x i32>, <4 x i32>) nounwind
elm_move.ll 18 declare <16 x i8> @llvm.mips.move.v(<16 x i8>) nounwind
  /external/llvm/test/CodeGen/Mips/
optimize-pic-o0.ll 33 declare void @foo(...)
sb1.ll 20 declare i32 @printf(i8*, ...)
sh1.ll 20 declare i32 @printf(i8*, ...)
sll1.ll 19 declare i32 @printf(i8*, ...)
sll2.ll 19 declare i32 @printf(i8*, ...)
srl2.ll 20 declare i32 @printf(i8*, ...)
  /external/llvm/test/CodeGen/NVPTX/
fast-math.ll 4 declare float @llvm.nvvm.sqrt.f(float)
ldu-i8.ll 5 declare i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8*)
rsqrt.ll 5 declare float @llvm.nvvm.sqrt.f(float)
surf-read.ll 5 declare i32 @llvm.nvvm.suld.1d.i32.trap(i64, i32)
symbol-naming.ll 31 declare i32 @printf(i8*, ...)
tex-read.ll 5 declare { float, float, float, float } @llvm.nvvm.tex.1d.v4f32.i32(i64, i64, i32)
  /external/llvm/test/CodeGen/PowerPC/
2008-07-15-Fabs.ll 19 declare ppc_fp128 @fabsl(ppc_fp128) nounwind readnone
cr1eq.ll 18 declare i32 @printf(i8*, ...)
cr_spilling.ll 27 declare i32 @printf(i8*, ...)
ctrloop-cpsgn.ll 24 declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0
dcbt-sched.ll 14 declare void @llvm.prefetch(i8*, i32, i32, i32)
fsl-e500mc.ll 22 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
fsl-e5500.ll 22 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
fsqrt.ll 13 declare double @llvm.sqrt.f64(double)
named-reg-alloc-r1.ll 18 declare i32 @llvm.read_register.i32(metadata) nounwind
ppc-prologue.ll 26 declare i32 @_Z3barPi(i32*)
ppc64-altivec-abi.ll 24 declare void @test(i64, <4 x i32>, i64, <4 x i32>, i64)

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