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| /external/llvm/test/CodeGen/X86/ |
| 2010-06-25-asm-RA-crash.ll | 17 declare x86_stdcallcc void @RtlUnwind(...)
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| 2011-03-09-Physreg-Coalescing.ll | 11 declare fastcc i8* @save_string(i8* %d, i8* nocapture %s) nounwind
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| 2011-10-11-SpillDead.ll | 19 declare void @g()
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| 2012-03-20-LargeConstantExpr.ll | 17 declare void @memset_pattern16(i8*, i8*, i64)
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| 2012-07-23-select_cc.ll | 8 declare void @use(double)
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| SwitchLowering.ll | 27 declare void @foo(i8)
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| anyregcc-crash.ll | 17 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
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| atom-fixup-lea4.ll | 20 declare void @_ZN12ValueWrapperIS_IS_IdEEEC2Ev(%struct.ValueWrapper.7*) unnamed_addr #0 align 2
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| avx-vzeroupper.ll | 3 declare i32 @foo()
4 declare <4 x float> @do_sse(<4 x float>)
5 declare <8 x float> @do_avx(<8 x float>)
6 declare <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone
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| avx-win64.ll | 44 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
45 declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x float>) nounwind readonly
46 declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x float>, <8 x float>) nounwind
47 declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
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| byval7.ll | 21 declare void @t(i32, %struct.S* byval )
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| coalescer-commute5.ll | 21 declare <16 x i8> @llvm.x86.sse2.pcmpeq.b(<16 x i8>, <16 x i8>) nounwind readnone
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| combine-avx-intrinsics.ll | 115 declare <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double>, <4 x double>, i32)
116 declare <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float>, <8 x float>, i32)
117 declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 x double>)
118 declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>)
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| commute-intrinsic.ll | 17 declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone
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| constant-pool-remat-0.ll | 16 declare float @qux(float %y)
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| cse-add-with-overflow.ll | 43 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32)
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| dagcombine-buildvector.ll | 27 declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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| extended-fma-contraction.ll | 22 declare <3 x float> @llvm.fmuladd.v3f32(<3 x float>, <3 x float>, <3 x float>) nounwind readnone
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| extractps.ll | 26 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
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| fast-isel-bc.ll | 8 declare void @func2(x86_mmx)
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| fast-isel-expect.ll | 8 declare i64 @llvm.expect.i64(i64, i64)
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| fast-isel-i1.ll | 4 declare i32 @test1a(i32)
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| fastcc-byval.ll | 24 declare fastcc void @foo(%struct.MVT* byval)
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| /external/llvm/test/CodeGen/X86/GC/ |
| erlang-gc.ll | 25 declare i32 @foo(i32)
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| ocaml-gc.ll | 33 declare i32 @foo(i32)
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