/external/llvm/test/CodeGen/ARM/ |
memset-inline.ll | 28 declare void @something(i8*) nounwind 29 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind 30 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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vhsub.ll | 111 declare <8 x i8> @llvm.arm.neon.vhsubs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 112 declare <4 x i16> @llvm.arm.neon.vhsubs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 113 declare <2 x i32> @llvm.arm.neon.vhsubs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 115 declare <8 x i8> @llvm.arm.neon.vhsubu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone 116 declare <4 x i16> @llvm.arm.neon.vhsubu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone 117 declare <2 x i32> @llvm.arm.neon.vhsubu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone 119 declare <16 x i8> @llvm.arm.neon.vhsubs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone 120 declare <8 x i16> @llvm.arm.neon.vhsubs.v8i16(<8 x i16>, <8 x i16>) nounwind readnone 121 declare <4 x i32> @llvm.arm.neon.vhsubs.v4i32(<4 x i32>, <4 x i32>) nounwind readnone 123 declare <16 x i8> @llvm.arm.neon.vhsubu.v16i8(<16 x i8>, <16 x i8>) nounwind readnon [all...] |
vpadal.ll | 111 declare <4 x i16> @llvm.arm.neon.vpadals.v4i16.v8i8(<4 x i16>, <8 x i8>) nounwind readnone 112 declare <2 x i32> @llvm.arm.neon.vpadals.v2i32.v4i16(<2 x i32>, <4 x i16>) nounwind readnone 113 declare <1 x i64> @llvm.arm.neon.vpadals.v1i64.v2i32(<1 x i64>, <2 x i32>) nounwind readnone 115 declare <4 x i16> @llvm.arm.neon.vpadalu.v4i16.v8i8(<4 x i16>, <8 x i8>) nounwind readnone 116 declare <2 x i32> @llvm.arm.neon.vpadalu.v2i32.v4i16(<2 x i32>, <4 x i16>) nounwind readnone 117 declare <1 x i64> @llvm.arm.neon.vpadalu.v1i64.v2i32(<1 x i64>, <2 x i32>) nounwind readnone 119 declare <8 x i16> @llvm.arm.neon.vpadals.v8i16.v16i8(<8 x i16>, <16 x i8>) nounwind readnone 120 declare <4 x i32> @llvm.arm.neon.vpadals.v4i32.v8i16(<4 x i32>, <8 x i16>) nounwind readnone 121 declare <2 x i64> @llvm.arm.neon.vpadals.v2i64.v4i32(<2 x i64>, <4 x i32>) nounwind readnone 123 declare <8 x i16> @llvm.arm.neon.vpadalu.v8i16.v16i8(<8 x i16>, <16 x i8>) nounwind readnon [all...] |
vrec.ll | 35 declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone 36 declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone 38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone 39 declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone 59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone 60 declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone 94 declare <2 x i32> @llvm.arm.neon.vrsqrte.v2i32(<2 x i32>) nounwind readnone 95 declare <4 x i32> @llvm.arm.neon.vrsqrte.v4i32(<4 x i32>) nounwind readnone 97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone 98 declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnon [all...] |
/external/llvm/test/CodeGen/Generic/ |
add-with-overflow.ll | 39 declare i32 @printf(i8*, ...) nounwind 40 declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) 41 declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
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/external/llvm/test/CodeGen/Inputs/ |
DbgValueOtherTargets.ll | 10 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone 12 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
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/external/llvm/test/CodeGen/Mips/ |
cache-intrinsic.ll | 22 declare i32 @printf(i8*, ...) 24 declare i8* @strcpy(i8*, i8*) 26 declare void @llvm.clear_cache(i8*, i8*)
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i64arg.ll | 30 declare void @ff1(i32, i64) 32 declare void @ff2(i64, double) 34 declare void @ff3(i32, i64, i32, i64)
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stackcoloring.ll | 35 declare void @llvm.lifetime.start(i64, i8* nocapture) 37 declare i32 @foo2(i32, i32*) 39 declare void @llvm.lifetime.end(i64, i8* nocapture)
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/external/llvm/test/CodeGen/NVPTX/ |
ctlz.ll | 5 declare i16 @llvm.ctlz.i16(i16, i1) readnone 6 declare i32 @llvm.ctlz.i32(i32, i1) readnone 7 declare i64 @llvm.ctlz.i64(i64, i1) readnone
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cttz.ll | 6 declare i16 @llvm.cttz.i16(i16, i1) readnone 7 declare i32 @llvm.cttz.i32(i32, i1) readnone 8 declare i64 @llvm.cttz.i64(i64, i1) readnone
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refl1.ll | 15 declare float @llvm.nvvm.sin.approx.ftz.f(float) #1 18 declare float @llvm.nvvm.cos.approx.ftz.f(float) #1 21 declare float @llvm.nvvm.div.approx.ftz.f(float, float) #1
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/external/llvm/test/CodeGen/R600/ |
input-mods.ll | 22 declare float @llvm.exp2.f32(float) readnone 23 declare float @llvm.fabs.f32(float) readnone 24 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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llvm.rint.f64.ll | 43 declare double @llvm.rint.f64(double) #0 44 declare <2 x double> @llvm.rint.v2f64(<2 x double>) #0 45 declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0
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llvm.round.ll | 39 declare float @llvm.round.f32(float) 40 declare <2 x float> @llvm.round.v2f32(<2 x float>) 41 declare <4 x float> @llvm.round.v4f32(<4 x float>)
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/external/llvm/test/CodeGen/SystemZ/ |
fp-abs-02.ll | 6 declare float @llvm.fabs.f32(float %f) 17 declare double @llvm.fabs.f64(double %f) 30 declare fp128 @llvm.fabs.f128(fp128 %f)
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/external/llvm/test/CodeGen/X86/ |
avx512-fma-intrinsics.ll | 9 declare <16 x float> @llvm.x86.fma.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone 17 declare <8 x double> @llvm.x86.fma.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone 25 declare <16 x float> @llvm.x86.fma.vfmsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone 33 declare <8 x double> @llvm.x86.fma.vfmsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone 41 declare <16 x float> @llvm.x86.fma.vfnmadd.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone 49 declare <8 x double> @llvm.x86.fma.vfnmadd.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone 57 declare <16 x float> @llvm.x86.fma.vfnmsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone 65 declare <8 x double> @llvm.x86.fma.vfnmsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind readnone 73 declare <16 x float> @llvm.x86.fma.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>) nounwind readnone 81 declare <8 x double> @llvm.x86.fma.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>) nounwind rea (…) [all...] |
cache-intrinsic.ll | 22 declare i32 @printf(i8*, ...) 24 declare i8* @strcpy(i8*, i8*) 26 declare void @llvm.clear_cache(i8*, i8*)
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legalize-libcalls.ll | 33 declare float @cosf(float) nounwind readnone 34 declare float @sinf(float) nounwind readnone 35 declare hidden fastcc void @copy_rtx() nounwind
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mmx-shift.ll | 15 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone 27 declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone 39 declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone
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personality.ll | 38 declare void @_Z1gv() 40 declare void @__cxa_end_catch() 42 declare i32 @__gxx_personality_v0(...)
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sse42.ll | 4 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind 5 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind 6 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
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x86-upgrade-avx-vbroadcast.ll | 37 declare <8 x float> @llvm.x86.avx.vbroadcast.ss.256(i8*) 39 declare <4 x double> @llvm.x86.avx.vbroadcast.sd.256(i8*) 41 declare <4 x float> @llvm.x86.avx.vbroadcast.ss(i8*)
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/external/llvm/test/CodeGen/XCore/ |
varargs.ll | 21 declare void @llvm.va_start(i8*) nounwind 22 declare void @llvm.va_end(i8*) nounwind 23 declare void @f(i32) nounwind
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/external/llvm/test/Feature/ |
varargs.ll | 8 declare void @llvm.va_start(i8*) 10 declare void @llvm.va_copy(i8*, i8*) 12 declare void @llvm.va_end(i8*)
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