| /bionic/libc/arch-mips64/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /development/ndk/platforms/android-L/arch-mips/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /development/ndk/platforms/android-L/arch-mips64/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-21/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-21/arch-mips64/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /external/pdfium/core/src/fdrm/crypto/ |
| fx_crypt_sha.cpp | 219 #define ROTR(x,n) (SHR(x,n) | (x << (32 - n)))
220 #define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
221 #define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
222 #define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
223 #define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25))
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips64.cc | 493 COMPARE(rotr(a0, a1, 0),
494 "00252002 rotr a0, a1, 0");
495 COMPARE(rotr(s0, s1, 8),
496 "00318202 rotr s0, s1, 8");
497 COMPARE(rotr(a6, a7, 24),
498 "002b5602 rotr a6, a7, 24");
499 COMPARE(rotr(v0, v1, 31),
500 "002317c2 rotr v0, v1, 31");
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 26 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 38 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
39 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/openssl/crypto/des/asm/ |
| des-586.pl | 187 &rotr($L,3); # r
189 &rotr($R,3); # l
217 &rotr( $t, 4 );
279 { &rotr($tt, 3-$lr); }
285 { &rotr($r, 2-$lr); }
298 else { &rotr($r, $lr-2); }
304 else { &rotr($l, $lr-3); }
312 &rotr($tt , 4);
|
| /external/chromium_org/third_party/boringssl/src/crypto/sha/asm/ |
| sha512-armv4.pl | 92 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
147 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
324 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
341 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/third_party/libyuv/source/ |
| scale_mips.cc | 375 "rotr $t2, $t0, 8 \n" // |S0|S3|S2|S1|
376 "rotr $t6, $t1, 8 \n" // |T0|T3|T2|T1|
387 "rotr $t2, $t2, 16 \n" // |0|S1|0|S2|
388 "rotr $t6, $t6, 16 \n" // |0|T1|0|T2|
432 "rotr $t4, $t0, 8 \n" // |S0|S3|S2|S1|
433 "rotr $t6, $t1, 8 \n" // |T0|T3|T2|T1|
444 "rotr $t4, $t4, 16 \n" // |0|S1|0|S2|
445 "rotr $t6, $t6, 16 \n" // |0|T1|0|T2|
537 "rotr $t1, $t1, 16 \n" // |S5|S4|S7|S6|
597 "rotr $t1, $t1, 16 \n" // |S5|S4|S7|S6
[all...] |
| /external/chromium_org/third_party/libyuv/source/ |
| scale_mips.cc | 375 "rotr $t2, $t0, 8 \n" // |S0|S3|S2|S1|
376 "rotr $t6, $t1, 8 \n" // |T0|T3|T2|T1|
387 "rotr $t2, $t2, 16 \n" // |0|S1|0|S2|
388 "rotr $t6, $t6, 16 \n" // |0|T1|0|T2|
432 "rotr $t4, $t0, 8 \n" // |S0|S3|S2|S1|
433 "rotr $t6, $t1, 8 \n" // |T0|T3|T2|T1|
444 "rotr $t4, $t4, 16 \n" // |0|S1|0|S2|
445 "rotr $t6, $t6, 16 \n" // |0|T1|0|T2|
537 "rotr $t1, $t1, 16 \n" // |S5|S4|S7|S6|
597 "rotr $t1, $t1, 16 \n" // |S5|S4|S7|S6
[all...] |
