| /external/openssl/crypto/perlasm/ |
| x86asm.pl | 65 sub ::rotr { &ror(@_); }
|
| /external/chromium_org/third_party/boringssl/src/crypto/sha/asm/ |
| sha1-586.pl | 169 &rotr($b,2); # b=ROTATE(b,30)
196 &rotr($b,$n==16?2:7); # b=ROTATE(b,30)
213 &rotr($b,2); # b=ROTATE(b,30)
238 &rotr($b,7); # b=ROTATE(b,30)
246 &rotr($a,5) if ($n==79);
256 &rotr($b,2); # b=ROTATE(b,30)
281 &rotr($b,7); # b=ROTATE(b,30)
300 &rotr($b,2); # b=ROTATE(b,30)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 181 case ISD::ROTR: return "rotr";
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUInstructions.td | 472 // rotr pattern
474 (rotr i32:$src0, i32:$src1),
|
| /system/core/include/private/pixelflinger/ |
| ggl_context.h | 48 "rotr %0, %0, 16"
61 "rotr %0, %0, 16"
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 218 // mips32r2, rotr & rotrv
220 db_printf("rotr\t%s,%s,%d", reg_name[i.RType.rd],
|
| MIPSAssembler.cpp | 401 mMips->ROTR(tmpReg, amode.reg, amode.value);
512 mMips->ROTR(Rd, amode.reg, amode.value);
544 mMips->ROTR(Rd, amode.reg, amode.value);
[all...] |
| /external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
| min_max_operations_mips.c | 85 "rotr %[tmp32_0], %[totMax], 16 \n\t"
|
| /external/llvm/lib/TableGen/ |
| SetTheory.cpp | 254 addOperator("rotr", new RotOp(true));
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrInfo.td | 165 def ROTR_MM : MMRel, shift_rotate_imm<"rotr", uimm5, GPR32Opnd, II_ROTR>,
|
| Mips16ISelLowering.cpp | 144 setOperationAction(ISD::ROTR, MVT::i32, Expand);
145 setOperationAction(ISD::ROTR, MVT::i64, Expand);
|
| Mips64InstrInfo.td | 129 def DROTR : shift_rotate_imm<"drotr", uimm6, GPR64Opnd, II_DROTR, rotr,
132 def DROTRV : shift_rotate_reg<"drotrv", GPR64Opnd, II_DROTRV, rotr>,
|
| MipsInstrInfo.td | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-rev.ll | 40 ; 01234567 ->(bswap) 76543210 ->(rotr) 10765432
|
| logical_shifted_reg.ll | 175 ; operations. DAGCombiner should ensure we the ROTR during
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32r2.txt | 335 # CHECK: rotr $9, $6, 7
|
| mips32r2_le.txt | 335 # CHECK: rotr $9, $6, 7
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 151 // GPU doesn't have a rotl, rotr, or byteswap instruction
152 setOperationAction(ISD::ROTR, VT, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 151 // GPU doesn't have a rotl, rotr, or byteswap instruction
152 setOperationAction(ISD::ROTR, VT, Expand);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.td | [all...] |
| NVPTXISelLowering.cpp | 166 setOperationAction(ISD::ROTR, MVT::i64, Legal);
169 setOperationAction(ISD::ROTR, MVT::i64, Expand);
173 setOperationAction(ISD::ROTR, MVT::i32, Legal);
176 setOperationAction(ISD::ROTR, MVT::i32, Expand);
180 setOperationAction(ISD::ROTR, MVT::i16, Expand);
182 setOperationAction(ISD::ROTR, MVT::i8, Expand);
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 630 // Test ROTR and ROTRV instructions.
659 // ROTR instruction (called through the Ror macro).
[all...] |
| test-assembler-mips64.cc | 632 // Test ROTR and ROTRV instructions.
661 // ROTR instruction (called through the Ror macro).
[all...] |
| /external/openssl/crypto/bn/asm/ |
| ia64-mont.pl | 121 .rotr a[3],n[3],t[2]
412 .rotr t[8]
|
| /external/linux-tools-perf/perf-3.12.0/arch/ia64/lib/ |
| memcpy_mck.S | 188 .rotr v[2*PREFETCH_DIST]
|
