| /external/llvm/test/CodeGen/AArch64/ |
| arm64-returnaddr.ll | 8 %0 = tail call i8* @llvm.returnaddress(i32 0)
22 %0 = tail call i8* @llvm.returnaddress(i32 2)
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| arm64-sqshl-uqshl-i64Contant.ll | 7 %1 = tail call i64 @llvm.aarch64.neon.sqshl.i64(i64 %a, i64 36)
14 %1 = tail call i64 @llvm.aarch64.neon.uqshl.i64(i64 %a, i64 36)
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| regress-fp128-livein.ll | 10 %call3 = tail call i32 @g(fp128 %conv2)
11 %call8 = tail call i32 @h(double %conv6)
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| returnaddr.ll | 7 %0 = tail call i8* @llvm.returnaddress(i32 0)
17 %0 = tail call i8* @llvm.returnaddress(i32 2)
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| /external/llvm/test/CodeGen/ARM/ |
| 2008-05-19-ScavengerAssert.ll | 12 %tmp151 = tail call fastcc i32 @get_mem2Dint( i32*** getelementptr (%struct.Decoders* @decoders, i32 0, i32 0), i32 16, i32 16 ) ; <i32> [#uses=1]
13 %tmp158 = tail call i8* @calloc( i32 0, i32 4 ) ; <i8*> [#uses=0]
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| 2009-09-27-CoalescerBug.ll | 15 %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
20 %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
|
| call-noret-minsize.ll | 12 tail call void @bar() noreturn nounwind
23 tail call void @t1() noreturn nounwind
|
| call-noret.ll | 14 tail call void @bar() noreturn nounwind
27 tail call void @t1() noreturn nounwind
|
| /external/llvm/test/CodeGen/Mips/ |
| gpreg-lazy-binding.ll | 13 tail call void @externalFunc() nounwind
14 tail call fastcc void @internalFunc()
|
| inlineasm_constraint.ll | 10 tail call i16 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i16 7, i16 4096) nounwind
16 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i32 7, i32 -3) nounwind
22 tail call i32 asm sideeffect "addiu $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
28 tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
34 tail call i32 asm sideeffect "add $0,$1,$3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
40 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,N"(i32 7, i32 -3) nounwind
46 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,O"(i32 7, i16 -3) nounwind
52 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,P"(i32 7, i32 65535) nounwind
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-04-24-InlineAsm-I-Modifier.ll | 7 %tmp1 = tail call i32 asm "foo${1:I} $0, $1", "=r,rI"( i32 %X )
12 %tmp1 = tail call i32 asm "bar${1:I} $0, $1", "=r,rI"( i32 47 )
|
| 2008-12-02-LegalizeTypeAssert.ll | 9 %0 = tail call ppc_fp128 @copysignl(ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 %a) nounwind readnone ; <ppc_fp128> [#uses=0]
11 %1 = tail call ppc_fp128 @copysignl(ppc_fp128 %iftmp.1.0, ppc_fp128 %b) nounwind readnone ; <ppc_fp128> [#uses=0]
|
| 2010-05-03-retaddr1.ll | 10 %0 = tail call i8* @llvm.frameaddress(i32 1) ; <i8*> [#uses=1]
23 %0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| 2007-06-15-IntToMMX.ll | 11 %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp2, x86_mmx %tmp3 ) ; <x86_mmx> [#uses=1]
13 tail call void @llvm.x86.mmx.emms( )
|
| btq.ll | 14 tail call void @bar() nounwind
30 tail call void @bar() nounwind
|
| byval6.ll | 9 tail call void (i32, ...)* @bar( i32 3, %struct.W* byval @.cpx ) nounwind
10 tail call void (i32, ...)* @baz( i32 3, %struct.W* byval @B ) nounwind
|
| imul64-lea.ll | 8 %tmp.0 = tail call i64 @foo64( )
19 %tmp.0 = tail call i32 @foo32( )
|
| or-branch.ll | 5 %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
12 %tmp5 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
|
| pr3457.ll | 7 %0 = tail call double (...)* @test() nounwind ; <double> [#uses=2]
8 %1 = tail call double (...)* @test() nounwind ; <double> [#uses=2]
|
| returned-trunc-tail-calls.ll | 11 tail call i32 @ret32(i32 returned %in)
20 tail call i64 @ret64(i64 returned %val)
29 tail call i32 @ret32(i32 returned %small)
46 tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
57 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
73 tail call i64 @ret64(i64 returned undef)
80 %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
93 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
|
| tail-threshold.ll | 1 ; RUN: llc -mtriple=x86_64-pc-linux-gnu -tail-merge-threshold 2 < %s | FileCheck %s
4 ; tail-merge-threshold predecessors.
|
| tailcall-calleesave.ll | 15 %d = tail call i32* @bar(i32* %a) nounwind
17 tail call fastcc void @foo(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) nounwind
|
| tailcall-cgp-dup.ll | 3 ; Teach CGP to dup returns to enable tail call optimization.
20 %call = tail call i32 @f1() nounwind
25 %call2 = tail call i32 @f2() nounwind
30 %call4 = tail call i32 @f3() nounwind
35 %call6 = tail call i32 @f4() nounwind
40 %call8 = tail call i32 @f5() nounwind
45 %call10 = tail call i32 @f6() nounwind
80 %call4.i = tail call i8* @bar(i8* undef) optsize
|
| tailcall-fastisel.ll | 7 %tmp20 = tail call fastcc i8* @"visit_array_aux<`Reference>"(%0 %arg, i32 undef) ; <i8*> [#uses=1]
14 %0 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=1]
|
| /external/llvm/test/Object/Inputs/ |
| trivial.ll | 5 %call = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) nounwind
6 tail call void bitcast (void (...)* @SomeOtherFunction to void ()*)() nounwind
|
