| /external/chromium_org/third_party/mesa/src/src/glx/ |
| glxextensions.c | 47 #define EXT_ENABLED(bit,supported) (IS_SET( supported, bit ))
55 unsigned char bit; member in struct:extension_info
255 /* global bit-fields of available extensions and their characteristics */
303 SET_BIT(supported, ext[i].bit);
306 CLR_BIT(supported, ext[i].bit);
319 * Convert the server's extension string to a bit-field.
322 * \param server_support Bit-field of supported extensions.
326 * bit-fields used to track each of these have different sizes. Therefore,
345 /* Set the bit for the extension in the server_support table
394 const unsigned bit = known_glx_extensions[i].bit; local
414 const unsigned bit = known_gl_extensions[i].bit; local
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_weighted_pred_bi_default.s | 178 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
179 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer)
210 add r0,r0,r7 @pi2_src1 + 4*src_strd1 - 2*wd(since pi2_src1 is 16 bit pointer double the increment with double the wd decrement)
228 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
229 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer)
251 add r0,r0,r7 @pi2_src1 + 2*src_strd1 - 2*wd(since pi2_src1 is 16 bit pointer double the increment with double the wd decrement)
266 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
267 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer)
293 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
294 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer
[all...] |
| /external/mesa3d/src/glx/ |
| glxextensions.c | 47 #define EXT_ENABLED(bit,supported) (IS_SET( supported, bit ))
55 unsigned char bit; member in struct:extension_info
255 /* global bit-fields of available extensions and their characteristics */
303 SET_BIT(supported, ext[i].bit);
306 CLR_BIT(supported, ext[i].bit);
319 * Convert the server's extension string to a bit-field.
322 * \param server_support Bit-field of supported extensions.
326 * bit-fields used to track each of these have different sizes. Therefore,
345 /* Set the bit for the extension in the server_support table
394 const unsigned bit = known_glx_extensions[i].bit; local
414 const unsigned bit = known_gl_extensions[i].bit; local
[all...] |
| /external/chromium_org/third_party/icu/source/common/ |
| usc_impl.c | 122 int8_t bit = 0; local
130 bit += 16;
135 bit += 8;
140 bit += 4;
145 bit += 2;
150 bit += 1;
153 return bit;
|
| /external/icu/icu4c/source/common/ |
| usc_impl.c | 122 int8_t bit = 0; local
130 bit += 16;
135 bit += 8;
140 bit += 4;
145 bit += 2;
150 bit += 1;
153 return bit;
|
| /external/chromium_org/v8/src/mips64/ |
| regexp-macro-assembler-mips64.cc | 99 * --------- The following output registers are 32-bit values. ---------
330 RegList regexp_registers_to_retain = current_input_offset().bit() |
331 current_character().bit() | backtrack_stackpointer().bit();
634 RegList registers_to_retain = s0.bit() | s1.bit() | s2.bit() |
635 s3.bit() | s4.bit() | s5.bit() | s6.bit() | s7.bit() | fp.bit()
[all...] |
| /external/antlr/antlr-3.4/runtime/JavaScript/src/org/antlr/runtime/ |
| BitSet.js | 10 * @param {Number|Array} [bits] a 32 bit number or array of 32 bit numbers
56 * Create mask for bit modded to fit in a single word.
60 * @param {Number} bitNumber the bit to create a mask for.
83 * @param {Number} bit a number to be included in the BitSet
85 * hold bit.
89 wordNumber: function(bit) {
90 return bit >> org.antlr.runtime.BitSet.LOG_BITS; // bit / BITS
207 * @param {org.antlr.runtime.BitSet} a a bit set
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| radeon_tcl.c | 208 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
529 static char *getFallbackString(GLuint bit)
532 while (bit > 1) {
534 bit >>= 1;
541 void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
547 rmesa->radeon.TclFallback |= bit;
551 getFallbackString( bit ));
556 rmesa->radeon.TclFallback &= ~bit;
557 if (oldfallback == bit) {
560 getFallbackString( bit ));
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_tcl.c | 208 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
529 static char *getFallbackString(GLuint bit)
532 while (bit > 1) {
534 bit >>= 1;
541 void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
547 rmesa->radeon.TclFallback |= bit;
551 getFallbackString( bit ));
556 rmesa->radeon.TclFallback &= ~bit;
557 if (oldfallback == bit) {
560 getFallbackString( bit ));
[all...] |
| /external/chromium_org/third_party/smhasher/src/ |
| KeysetTest.cpp | 67 // Flipping a bit of a key should, with overwhelmingly high probability,
114 for(int bit = 0; bit < (len * 8); bit++)
116 // Flip a bit, hash the key -> we should get a different result.
118 flipbit(key2,len,bit);
128 flipbit(key2,len,bit);
|
| /external/icu/icu4c/source/i18n/ |
| collationsettings.cpp | 152 CollationSettings::setFlag(int32_t bit, UColAttributeValue value,
157 options |= bit;
160 options &= ~bit;
163 options = (options & ~bit) | (defaultOptions & bit);
|
| /external/pdfium/core/src/fxcodec/codec/ |
| fx_codec_fax.cpp | 11 int _FindBit(const FX_BYTE* data_buf, int max_pos, int start_pos, int bit)
16 FX_LPCBYTE leading_pos = bit ? OneLeadPos : ZeroLeadPos;
19 if (bit) {
29 FX_BYTE skip = bit ? 0x00 : 0xff;
102 #define ADDBIT(code, bit) code = code << 1; if (bit) code ++;
377 FX_BOOL bit = NEXTBIT;
local
379 if (bit) {
430 bit = NEXTBIT;
431 if (bit) {
494 int bit = NEXTBIT; local
517 int bit = NEXTBIT; local
640 int bit = m_pSrcBuf[bitpos0 \/ 8] & (1 << (7 - bitpos0 % 8)); local
[all...] |
| /bootable/recovery/minui/ |
| events.c | 33 #define test_bit(bit, array) \
34 ((array)[(bit)/BITS_PER_LONG] & (1 << ((bit) % BITS_PER_LONG)))
|
| /cts/ |
| CtsTestCaseList.mk | 190 # List of native tests. For 32 bit targets, assumes that there will be
191 # one test executable, and it will end in 32. For 64 bit targets, assumes
193 # bit executable and one that ends in 64 for the 64 bit executable.
228 # NOTE: If compiling on a 64 bit target, TARGET_2ND_ARCH will be non-empty
230 # directory. If compiling on a 32 bit target, TARGET_2ND_ARCH will be
|
| /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
| IntArray.java | 12 * This expands 8 bit indices into 16 bit contents, by inserting 0s between bits.
13 * In a binary field, this operation is the same as squaring an 8 bit number.
95 // First byte is 0 to enforce highest (=sign) bit is zero.
386 public void flipWord(int bit, int word)
389 int n = bit >>> 5;
392 int shift = bit & 0x1F;
408 public int getWord(int bit)
411 int n = bit >>> 5;
416 int shift = bit & 0x1F
651 int bit = i - m; local
671 int bit = i - m; local
[all...] |
| /external/chromium_org/third_party/skia/tests/ |
| DeviceLooperTest.cpp | 82 int bit = 1; local
85 if (mask & bit) {
90 bit <<= 1;
|
| /external/chromium_org/ui/events/ozone/evdev/ |
| event_device_info.cc | 35 bool BitIsSet(const unsigned long* bits, unsigned int bit) {
36 return (bits[bit / EVDEV_LONG_BITS] & (1UL << (bit % EVDEV_LONG_BITS)));
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm.cc | 171 __ stm(db_w, sp, r4.bit() | fp.bit() | lr.bit());
185 __ ldm(ia_w, sp, r4.bit() | fp.bit() | pc.bit());
242 __ stm(db_w, sp, r4.bit() | fp.bit() | lr.bit());
309 __ ldm(ia_w, sp, r4.bit() | fp.bit() | pc.bit())
[all...] |
| /external/deqp/framework/referencerenderer/ |
| rrRasterizer.hpp | 42 //! Get coverage bit value.
60 //! Set bit in coverage mask.
63 const deUint64 bit = getCoverageBit(numSamples, x, y, sampleNdx); local
64 return val ? (mask | bit) : (mask & ~bit);
67 //! Get coverage bit value in mask.
79 //! Get position of first coverage bit of fragment - equivalent to deClz64(getCoverageFragmentSampleBits(numSamples, x, y)).
|
| /external/libvorbis/doc/ |
| 03-codebook.tex | 32 relating to non-eight-bit bytes.
36 A codebook begins with a 24 bit sync pattern, 0x564342:
44 16 bit \varname{[codebook_dimensions]} and 24 bit \varname{[codebook_entries]} fields:
49 byte 4: [ X X X X X X X X ] [codebook_dimensions] (16 bit unsigned)
53 byte 7: [ X X X X X X X X ] [codebook_entries] (24 bit unsigned)
57 Next is the \varname{[ordered]} bit flag:
61 byte 8: [ X ] [ordered] (1 bit)
77 The decoder first reads one additional bit flag, the
83 byte 8: [ X 1 ] [sparse] flag (1 bit)
[all...] |
| /external/skia/tests/ |
| DeviceLooperTest.cpp | 82 int bit = 1; local
85 if (mask & bit) {
90 bit <<= 1;
|
| /build/target/board/generic_arm64/ |
| BoardConfig.mk | 32 # This architecture / CPU variant must NOT be used for any 64 bit
34 # to build an unbundled application or cts for all supported 32 and 64 bit
37 # If you're building a 64 bit platform (and not an application) the
|
| /external/chromium_org/third_party/cython/src/Cython/Compiler/ |
| FlowControl.pxd | 37 cdef public object bit
41 cdef public object bit
74 @cython.locals(bit=object, assmts=AssignmentList,
|
| /external/chromium_org/third_party/libwebp/utils/ |
| bit_writer.c | 10 // Bit writing and boolean coder
36 // If the following line wraps over 32bit, the test just after will catch it.
108 int VP8PutBit(VP8BitWriter* const bw, int bit, int prob) {
110 if (bit) {
123 return bit;
126 int VP8PutBitUniform(VP8BitWriter* const bw, int bit) {
128 if (bit) {
140 return bit;
260 // Special case of overflow handling for 32bit accumulator (2-steps flush).
|
| /external/chromium_org/third_party/mesa/src/src/egl/main/ |
| eglcontext.c | 43 * Return the API bit (one of EGL_xxx_BIT) of the context.
48 EGLint bit = 0; local
54 bit = EGL_OPENGL_ES_BIT;
58 bit = EGL_OPENGL_ES2_BIT;
65 bit = EGL_OPENVG_BIT;
68 bit = EGL_OPENGL_BIT;
74 return bit;
|
