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  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/
h264bsdWriteMacroblock.s 67 dRow15 DN D15.U8
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/
h264bsdWriteMacroblock.S 69 #define dRow15 D15.U8
  /bionic/libm/upstream-freebsd/lib/msun/ld128/
s_expl.c 364 D15 = 7.6478532249581686e-13, /* 0x1.ae892e3D16fcep-41 */
422 dx * (D14 + dx * (D15 + dx * (D16 +
  /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/
armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S 96 #define dXi7 D15.S32
188 #define dT1 D15.S32
armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S 111 #define dZi0 D15.F32
armSP_FFT_CToC_FC32_Radix4_unsafe_s.S 94 #define dYi1 D15.F32
armSP_FFT_CToC_SC16_Radix4_unsafe_s.S 101 #define dYi1 D15.S16
armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S 94 #define dYi3 D15.S32
armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S 119 #define dZi0 D15.S32
armSP_FFT_CToC_SC32_Radix4_unsafe_s.S 103 #define dYi1 D15.S32
armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S 83 #define dXi0 D15.S16
  /external/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.cpp 80 Reserved.set(Hexagon::D15);
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/
Radix4FFT_v7.s 31 fstmfdd sp!, {d8 - d15}
32 .vsave {d8 - d15}
93 VLD2.I32 {D12, D13, D14, D15}, [r8]
144 fldmfdd sp!, {d8 - d15}
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
armVCM4P10_DeblockingLuma_unsafe_s.s 66 dMask_1 DN D15.U8
263 ;// - Additional Params - alpha: D0, dMask_1: D15
armVCM4P10_Interpolate_Chroma_s.s 79 dDCoeff DN D15.U8
136 M_START armVCM4P10_Interpolate_Chroma, r11, d15
omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s 102 dMask_1 DN D15.U8
119 M_START omxVCM4P10_FilterDeblockingChroma_VerEdge_I, r12, d15
omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s 100 dMask_1 DN D15.U8
163 M_START omxVCM4P10_FilterDeblockingLuma_HorEdge_I, r11, d15
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s 146 dMask_1 DN D15.U8
209 M_START omxVCM4P10_FilterDeblockingLuma_VerEdge_I, r11, d15
  /external/libhevc/common/arm/
ihevc_sao_edge_offset_class3.s 304 VMOV.8 D15[7],r8 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cpy[16 - src_strd]), sign_up, 15)
373 VMOV.8 D15[7],r11 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cpy[16 - src_strd]), sign_up, 15)
411 VMOV.8 D15[7],r2 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cpy[16 - src_strd]), sign_up, 15)
503 VMOV.8 D15[7],r8 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[15] - pu1_src_cpy[16 - src_strd]), sign_up, 15)
    [all...]
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AsmBackend.cpp 450 // D14/D15 pair = 0x00000800
460 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15)
  /external/llvm/lib/Target/Sparc/Disassembler/
SparcDisassembler.cpp 101 SP::D14, SP::D30, SP::D15, SP::D31 };
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
omxVCM4P2_MCReconBlock_s.s 322 dRow7Shft DN D15.U8
358 M_START omxVCM4P2_MCReconBlock, r6, d15
  /external/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.h 126 case AArch64::D15: return AArch64::B15;
166 case AArch64::B15: return AArch64::D15;
    [all...]
  /external/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp 115 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15,
  /external/valgrind/main/memcheck/
mc_machine.c     [all...]

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