/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
scale_sig_neon.s | 55 VSHLL.S16 Q13, D3, #16 75 VSHLL.S16 Q11, D3, #16
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pred_lt4_1_neon.s | 63 VQDMLAL.S16 Q15, D11, D3
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
omxVCM4P10_PredictIntra_4x4_s.s | 88 dLeftVal3 DN D3.8 92 dLeftVal3U32 DN D3.U32 121 dAbove0 DN D3.U8 139 dEven0 DN D3.U8 158 dLeftHU0 DN D3.U8
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armVCM4P10_Interpolate_Chroma_s.s | 84 dRow1b DN D3.U8 126 dOut11U32 DN D3.U32
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/external/clang/test/SemaCXX/ |
cxx1y-variable-templates_in_class.cpp | 207 struct D3 { 210 static_assert(D3<float>::Data<int> == 100, ""); 211 template const char D3<float>::Data<char>; // expected-error {{undefined}}
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/external/llvm/lib/Target/ARM/ |
ARMExpandPseudoInsts.cpp | 358 unsigned &D1, unsigned &D2, unsigned &D3) { 363 D3 = TRI->getSubReg(Reg, ARM::dsub_3); 368 D3 = TRI->getSubReg(Reg, ARM::dsub_6); 374 D3 = TRI->getSubReg(Reg, ARM::dsub_7); 395 unsigned D0, D1, D2, D3; 396 GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 403 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 470 unsigned D0, D1, D2, D3; 471 GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); 478 MIB.addReg(D3, getUndefRegState(SrcIsUndef)) [all...] |
/art/runtime/arch/arm64/ |
context_arm64.cc | 122 fprs_[D3] = nullptr;
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quick_method_frame_info_arm64.h | 55 (1 << art::arm64::D3) | (1 << art::arm64::D4) | (1 << art::arm64::D5) |
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/bionic/libc/tools/ |
bionic_utils.py | 9 # and D(), D2(), D3(), D4() to add traces 23 def D3(msg):
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/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S | 83 #define dXi0 D3.S16
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armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S | 79 #define dX1 D3.S16
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armSP_FFT_CToC_SC16_Radix2_unsafe_s.S | 80 #define dX1 D3.S16
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armSP_FFT_CToC_SC32_Radix2_unsafe_s.S | 82 #define dX1 D3.S32
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armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 74 #define dButterfly1Imag13 D3.F32 82 #define dXi1 D3.F32
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armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 89 #define dButterfly1Imag13 D3.S16 97 #define dXi1 D3.S16
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omxSP_FFTInv_CCSToR_S32_Sfs_s.S | 118 #define dY1 D3.S32 122 #define dX1i D3.S32
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armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 82 #define dButterfly1Imag13 D3.S32 90 #define dXi1 D3.S32
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omxSP_FFTInv_CCSToR_S16_Sfs_s.S | 91 #define dY1 D3.S32 95 #define dX1i D3.S32
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/external/chromium_org/v8/test/mjsunit/harmony/ |
module-parsing.js | 84 module D3 = D2 150 export A, A1, A2, A3, B, I, C1, D1, D2, D3, E1, E2, E3, X, Y, Z, Wrap, x, y, UU
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/external/clang/test/CXX/temp/temp.param/ |
p15-cxx0x.cpp | 113 using D3 = drop<5, int, char, double, long>::type; // expected-note {{in instantiation of}}
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/external/chromium_org/v8/test/mjsunit/regress/ |
regress-3247124.js | 28 var foo = unescape("%E0%E2%EA%F4%FB%E3%F5%E1%E9%ED%F3%FA%E7%FC%C0%C2%CA%D4%DB%C3%D5%C1%C9%CD%D3%DA%C7%DC");
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/external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/arm/armv6/ |
walsh_v6.asm | 106 smusd r9, r9, lr ; D3 = a1<<2 - d1<<2 107 add r7, r5, r9 ; d1_3 = B3 + D3 108 sub r5, r5, r9 ; c1_3 = B3 - D3
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/external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
walsh_v6.asm | 106 smusd r9, r9, lr ; D3 = a1<<2 - d1<<2 107 add r7, r5, r9 ; d1_3 = B3 + D3 108 sub r5, r5, r9 ; c1_3 = B3 - D3
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
walsh_v6.asm | 106 smusd r9, r9, lr ; D3 = a1<<2 - d1<<2 107 add r7, r5, r9 ; d1_3 = B3 + D3 108 sub r5, r5, r9 ; c1_3 = B3 - D3
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/art/compiler/jni/quick/arm64/ |
calling_convention_arm64.cc | 33 D0, D1, D2, D3, D4, D5, D6, D7
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