| /external/llvm/lib/Target/XCore/ |
| XCoreSubtarget.h | 34 const DataLayout DL; // Calculates type size & alignment
58 const DataLayout *getDataLayout() const { return &DL; }
|
| XCoreSelectionDAGInfo.h | 25 explicit XCoreSelectionDAGInfo(const DataLayout &DL);
29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
|
| /external/valgrind/main/none/tests/s390x/ |
| dfp-2.c | 278 _Decimal128 d128 = 50.0005DL;
285 eextr(0.DL);
292 esxtr(0.DL);
299 ltxtr(0.0DL);
312 d128 = 12345678.54321DL;
315 slxt(0.DL, 2);
316 slxt(-0.DL, 2);
320 srxt(0.DL, 2);
321 srxt(-0.DL, 2);
334 d128 = 5.000005DL;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 361 DebugLoc DL = Op.getDebugLoc();
363 DL,
386 DL,
397 DL,
408 DL,
424 DebugLoc DL = Op.getDebugLoc();
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
446 Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType())
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| PHITransAddr.h | 40 const DataLayout *DL;
48 PHITransAddr(Value *addr, const DataLayout *DL)
49 : Addr(addr), DL(DL), TLI(nullptr) {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64SelectionDAGInfo.h | 23 explicit AArch64SelectionDAGInfo(const DataLayout *DL);
26 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
|
| AArch64Subtarget.h | 57 const DataLayout DL;
82 const DataLayout *getDataLayout() const { return &DL; }
94 bool isLittleEndian() const { return DL.isLittleEndian(); }
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectionDAGInfo.h | 23 explicit HexagonSelectionDAGInfo(const DataLayout &DL);
26 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 361 DebugLoc DL = Op.getDebugLoc();
363 DL,
386 DL,
397 DL,
408 DL,
424 DebugLoc DL = Op.getDebugLoc();
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
446 Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType())
[all...] |
| /external/llvm/lib/Target/R600/ |
| SILowerControlFlow.cpp | 139 DebugLoc DL = From.getDebugLoc();
140 BuildMI(*From.getParent(), &From, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
148 DebugLoc DL = MI.getDebugLoc();
159 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
164 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::EXP))
176 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM));
181 DebugLoc DL = MI.getDebugLoc();
185 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg)
188 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg)
199 DebugLoc DL = MI.getDebugLoc()
[all...] |
| AMDGPUISelLowering.cpp | 449 const DataLayout *DL = getDataLayout();
450 unsigned SrcSize = DL->getTypeSizeInBits(Src->getScalarType());
451 unsigned DestSize = DL->getTypeSizeInBits(Dest->getScalarType());
494 SDLoc DL, SelectionDAG &DAG) const {
495 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
599 SDLoc DL(InitPtr);
605 return DAG.getStore(Chain, DL, DAG.getConstant(*CI, VT), InitPtr,
613 return DAG.getStore(Chain, DL, DAG.getConstantFP(*CFP, VT), InitPtr,
626 SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, InitPtr, Offset);
632 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains)
[all...] |
| /external/llvm/include/llvm/Transforms/Utils/ |
| Cloning.h | 153 const DataLayout *DL = nullptr,
160 explicit InlineFunctionInfo(CallGraph *cg = nullptr, const DataLayout *DL = nullptr)
161 : CG(cg), DL(DL) {}
166 const DataLayout *DL;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SDNodeDbgValue.h | 50 DebugLoc DL;
56 bool indir, uint64_t off, DebugLoc dl,
58 Offset(off), DL(dl), Order(O),
66 SDDbgValue(MDNode *mdP, const Value *C, uint64_t off, DebugLoc dl,
68 mdPtr(mdP), IsIndirect(false), Offset(off), DL(dl), Order(O),
75 SDDbgValue(MDNode *mdP, unsigned FI, uint64_t off, DebugLoc dl, unsigned O) :
76 mdPtr(mdP), IsIndirect(false), Offset(off), DL(dl), Order(O)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 229 DebugLoc DL,
231 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
238 DebugLoc DL,
241 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
251 DebugLoc DL,
255 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
262 DebugLoc DL,
266 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
273 DebugLoc DL,
278 return BuildMI(BB, MII, DL, MCID, DestReg)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 424 SDLoc DL(ADDENode);
427 SDValue ACCIn = CurDAG->getNode(MipsISD::MTLOHI, DL, MVT::Untyped,
434 SDValue MAdd = CurDAG->getNode(MultOpc, DL, MVT::Untyped,
441 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MAdd);
445 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MAdd);
496 SDLoc DL(SUBENode);
499 SDValue ACCIn = CurDAG->getNode(MipsISD::MTLOHI, DL, MVT::Untyped,
506 SDValue MSub = CurDAG->getNode(MultOpc, DL, MVT::Glue,
513 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MSub);
517 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MSub)
[all...] |
| MipsLongBranch.cpp | 81 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
218 DebugLoc DL, MachineBasicBlock *MBBOpnd) {
224 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
251 DebugLoc DL = I.Br->getDebugLoc();
293 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
295 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA)
314 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT)
317 .append(BuildMI(*MF, DL, TII->get(BalOp)).addMBB(BalTgtMBB))
318 .append(BuildMI(*MF, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT)
325 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT
[all...] |
| MipsISelLowering.cpp | 439 SDLoc DL(N);
441 SDValue DivRem = DAG.getNode(Opc, DL, MVT::Glue,
448 SDValue CopyFromLo = DAG.getCopyFromReg(InChain, DL, LO, Ty,
457 SDValue CopyFromHi = DAG.getCopyFromReg(InChain, DL,
517 SDLoc DL(Op);
523 return DAG.getNode(MipsISD::FPCmp, DL, MVT::Glue, LHS, RHS,
529 SDValue False, SDLoc DL) {
534 return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL,
568 const SDLoc DL(N);
574 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0)
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 34 const DataLayout *DL;
37 const DataLayout *getDataLayout() const { return DL; }
40 explicit TargetSelectionDAGInfo(const DataLayout *DL);
57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl,
90 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
104 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl,
118 EmitTargetCodeForMemchr(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
131 EmitTargetCodeForStrcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
145 EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc dl,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 66 DebugLoc DL,
72 DebugLoc DL,
78 DebugLoc DL,
83 DebugLoc DL,
88 DebugLoc DL, unsigned DReg, unsigned Lane,
93 DebugLoc DL);
427 DebugLoc DL,
433 DL,
446 DebugLoc DL,
452 DL,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
86 DL = MBBI->getDebugLoc();
98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW)
115 DebugLoc DL = MBBI->getDebugLoc();
135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW);
148 DL = MBBI->getDebugLoc();
156 BuildMI(MBB, MBBI, DL,
160 BuildMI(MBB, MBBI, DL,
[all...] |
| MSP430Subtarget.h | 35 const DataLayout DL; // Calculates type size & alignment
56 const DataLayout *getDataLayout() const { return &DL; }
|
| /external/llvm/include/llvm/IR/ |
| DataLayout.h | 187 DataLayout(const DataLayout &DL) : LayoutMap(nullptr) { *this = DL; }
189 DataLayout &operator=(const DataLayout &DL) {
191 LittleEndian = DL.isLittleEndian();
192 StackNaturalAlign = DL.StackNaturalAlign;
193 ManglingMode = DL.ManglingMode;
194 LegalIntWidths = DL.LegalIntWidths;
195 Alignments = DL.Alignments;
196 Pointers = DL.Pointers;
460 DataLayout DL;
[all...] |
| GlobalAlias.h | 97 const GlobalObject *getBaseObject(const DataLayout &DL, APInt &Offset) const {
98 return const_cast<GlobalAlias *>(this)->getBaseObject(DL, Offset);
100 GlobalObject *getBaseObject(const DataLayout &DL, APInt &Offset) {
102 getAliasee()->stripAndAccumulateInBoundsConstantOffsets(DL, Offset));
|
| /external/llvm/lib/Analysis/ |
| PtrUseVisitor.cpp | 34 return GEPI.accumulateConstantOffset(DL, Offset);
|
| /external/llvm/lib/CodeGen/ |
| ErlangGC.cpp | 32 DebugLoc DL) const;
55 DebugLoc DL) const {
58 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
|
