/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_vs_emit.c | 110 if (inst->DstReg.File == PROGRAM_OUTPUT && 111 inst->DstReg.RelAddr && 112 inst->DstReg.Index < first_reladdr_output) 113 first_reladdr_output = inst->DstReg.Index; [all...] |
brw_vs_constval.c | 230 set_active(&t, inst->DstReg, get_active(&t, inst->SrcReg[0])); 234 set_active(&t, inst->DstReg, 0xf);
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vs_emit.c | 110 if (inst->DstReg.File == PROGRAM_OUTPUT && 111 inst->DstReg.RelAddr && 112 inst->DstReg.Index < first_reladdr_output) 113 first_reladdr_output = inst->DstReg.Index; [all...] |
brw_vs_constval.c | 230 set_active(&t, inst->DstReg, get_active(&t, inst->SrcReg[0])); 234 set_active(&t, inst->DstReg, 0xf);
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
program.c | 687 if (inst[i].DstReg.File == oldFile && inst[i].DstReg.Index == oldIndex) { 688 inst[i].DstReg.File = newFile; 689 inst[i].DstReg.Index = newIndex; 871 if (inst->DstReg.File == file) { 872 ASSERT(inst->DstReg.Index < usedSize); 873 if(inst->DstReg.Index < usedSize) 874 used[inst->DstReg.Index] = GL_TRUE; 1037 inst->DstReg.WriteMask = WRITEMASK_XYZW; [all...] |
/external/mesa3d/src/mesa/program/ |
program.c | 687 if (inst[i].DstReg.File == oldFile && inst[i].DstReg.Index == oldIndex) { 688 inst[i].DstReg.File = newFile; 689 inst[i].DstReg.Index = newIndex; 871 if (inst->DstReg.File == file) { 872 ASSERT(inst->DstReg.Index < usedSize); 873 if(inst->DstReg.Index < usedSize) 874 used[inst->DstReg.Index] = GL_TRUE; 1037 inst->DstReg.WriteMask = WRITEMASK_XYZW; [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ConditionalCompares.cpp | 179 /// Check if an operand defining DstReg is dead. 180 bool isDeadDef(unsigned DstReg); 258 bool SSACCmpConv::isDeadDef(unsigned DstReg) { 260 if (DstReg == AArch64::WZR || DstReg == AArch64::XZR) 262 if (!TargetRegisterInfo::isVirtualRegister(DstReg)) 266 return MRI->use_nodbg_empty(DstReg);
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AArch64InstrInfo.h | 52 unsigned &DstReg, unsigned &SubIdx) const override; 142 DebugLoc DL, unsigned DstReg,
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
r500_fragprog.c | 109 inst_mov->U.I.DstReg.WriteMask = 0; 110 inst_mov->U.I.DstReg.File = RC_FILE_NONE; 159 writer->Inst->U.I.DstReg.WriteMask = 0; 160 writer->Inst->U.I.DstReg.File = RC_FILE_NONE;
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radeon_variable.c | 57 var_ptr->Inst->U.I.DstReg.Index = new_index; 371 new_var = rc_variable(c, inst->U.I.DstReg.File, 372 inst->U.I.DstReg.Index, 373 inst->U.I.DstReg.WriteMask, &reader_data);
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radeon_dataflow.c | 261 if (opcode->HasDstReg && inst->DstReg.WriteMask) 262 cb(userdata, fullinst, inst->DstReg.File, inst->DstReg.Index, inst->DstReg.WriteMask); 348 rc_register_file file = inst->DstReg.File; 349 unsigned int index = inst->DstReg.Index; 353 inst->DstReg.File = file; 354 inst->DstReg.Index = index;
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600InstrInfo.h | 57 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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/external/llvm/lib/CodeGen/ |
MachineSink.cpp | 120 unsigned DstReg = MI->getOperand(0).getReg(); 122 !TargetRegisterInfo::isVirtualRegister(DstReg) || 127 const TargetRegisterClass *DRC = MRI->getRegClass(DstReg); 136 MRI->replaceRegWith(DstReg, SrcReg);
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PeepholeOptimizer.cpp | 265 unsigned SrcReg, DstReg, SubIdx; 266 if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) 269 if (TargetRegisterInfo::isPhysicalRegister(DstReg) || 277 // Ensure DstReg can get a register class that actually supports 279 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); 295 for (MachineInstr &UI : MRI->use_nodbg_instructions(DstReg)) 373 for (MachineInstr &UI : MRI->use_nodbg_instructions(DstReg)) 385 // About to add uses of DstReg, clear DstReg's kill flags. 387 MRI->clearKillFlags(DstReg); [all...] |
EarlyIfConversion.cpp | 113 // Latencies from Cond+Branch, TReg, and FReg to DstReg. 463 unsigned DstReg = PI.PHI->getOperand(0).getReg(); 464 TII->insertSelect(*Head, FirstTerm, HeadDL, DstReg, Cond, PI.TReg, PI.FReg); 484 unsigned DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst)); 485 TII->insertSelect(*Head, FirstTerm, HeadDL, DstReg, Cond, PI.TReg, PI.FReg); 488 // Rewrite PHI operands TPred -> (DstReg, Head), remove FPred. 493 PI.PHI->getOperand(i-2).setReg(DstReg);
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/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | 101 MachineInstrBuilder EmitInst(unsigned Opc, unsigned DstReg) { 103 DstReg); 111 MachineInstrBuilder EmitInstLoad(unsigned Opc, unsigned DstReg, 113 return EmitInst(Opc, DstReg).addReg(MemReg).addImm(MemOffset);
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
r500_fragprog.c | 109 inst_mov->U.I.DstReg.WriteMask = 0; 110 inst_mov->U.I.DstReg.File = RC_FILE_NONE; 159 writer->Inst->U.I.DstReg.WriteMask = 0; 160 writer->Inst->U.I.DstReg.File = RC_FILE_NONE;
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radeon_variable.c | 57 var_ptr->Inst->U.I.DstReg.Index = new_index; 371 new_var = rc_variable(c, inst->U.I.DstReg.File, 372 inst->U.I.DstReg.Index, 373 inst->U.I.DstReg.WriteMask, &reader_data);
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radeon_dataflow.c | 261 if (opcode->HasDstReg && inst->DstReg.WriteMask) 262 cb(userdata, fullinst, inst->DstReg.File, inst->DstReg.Index, inst->DstReg.WriteMask); 348 rc_register_file file = inst->DstReg.File; 349 unsigned int index = inst->DstReg.Index; 353 inst->DstReg.File = file; 354 inst->DstReg.Index = index;
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600InstrInfo.h | 57 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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/external/llvm/lib/Target/ARM/ |
Thumb2ITBlockPass.cpp | 119 unsigned DstReg = MI->getOperand(0).getReg(); 123 if (Uses.count(DstReg) || Defs.count(SrcReg))
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/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.h | 110 unsigned &SrcReg, unsigned &DstReg, 145 unsigned DstReg,
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/external/llvm/lib/Target/R600/ |
SIFixSGPRCopies.cpp | 181 unsigned DstReg = Copy.getOperand(0).getReg(); 184 const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
r200_fragshader.c | 270 if (inst->DstReg[optype].Index) { 271 GLuint dstreg = inst->DstReg[optype].Index - GL_REG_0_ATI; local 272 GLuint dstmask = inst->DstReg[optype].dstMask; 273 GLuint sat = inst->DstReg[optype].dstMod & GL_SATURATE_BIT_ATI; 274 GLuint dstmod = inst->DstReg[optype].dstMod; 278 SET_INST_2(opnum, optype) |= (dstreg + 1) << R200_TXC_OUTPUT_REG_SHIFT;
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
r200_fragshader.c | 270 if (inst->DstReg[optype].Index) { 271 GLuint dstreg = inst->DstReg[optype].Index - GL_REG_0_ATI; local 272 GLuint dstmask = inst->DstReg[optype].dstMask; 273 GLuint sat = inst->DstReg[optype].dstMod & GL_SATURATE_BIT_ATI; 274 GLuint dstmod = inst->DstReg[optype].dstMod; 278 SET_INST_2(opnum, optype) |= (dstreg + 1) << R200_TXC_OUTPUT_REG_SHIFT;
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