/art/runtime/arch/arm/ |
registers_arm.h | 28 R1 = 1,
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context_arm.cc | 97 gprs_[R1] = const_cast<uint32_t*>(&gZero);
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/external/clang/lib/Analysis/ |
ReachableCode.cpp | 505 SourceRange &R1, 507 R1 = R2 = SourceRange(); 519 R1 = UO->getSubExpr()->getSourceRange(); 524 R1 = CAO->getLHS()->getSourceRange(); 536 R1 = ME->getSourceRange(); 541 R1 = ASE->getLHS()->getSourceRange(); 547 R1 = CSC->getSubExpr()->getSourceRange(); 552 R1 = CE->getSubExpr()->getSourceRange(); 560 R1 = CSC->getSubExpr()->getSourceRange(); 565 R1 = S->getSourceRange() [all...] |
/art/compiler/utils/arm/ |
managed_register_arm_test.cc | 39 reg = ArmManagedRegister::FromCoreRegister(R1); 46 EXPECT_EQ(R1, reg.AsCoreRegister()); 236 EXPECT_EQ(R1, reg.AsRegisterPairHigh()); 247 EXPECT_EQ(R1, reg.AsRegisterPairLow()); 249 EXPECT_TRUE(reg.Equals(ArmManagedRegister::FromCoreRegisterPair(R1))); 293 EXPECT_TRUE(!no_reg.Equals(ArmManagedRegister::FromCoreRegister(R1))); 301 EXPECT_TRUE(!reg_R0.Equals(ArmManagedRegister::FromCoreRegister(R1))); 306 ArmManagedRegister reg_R1 = ArmManagedRegister::FromCoreRegister(R1); 309 EXPECT_TRUE(reg_R1.Equals(ArmManagedRegister::FromCoreRegister(R1))); 329 EXPECT_TRUE(!reg_S0.Equals(ArmManagedRegister::FromCoreRegister(R1))); [all...] |
/external/mdnsresponder/mDNSCore/ |
DNSDigest.c | 900 #define R1(a,b,c,d,k,s,t) { \ 969 R1(A,B,C,D,X[ 1], 5,0xf61e2562L); 970 R1(D,A,B,C,X[ 6], 9,0xc040b340L); 971 R1(C,D,A,B,X[11],14,0x265e5a51L); 972 R1(B,C,D,A,X[ 0],20,0xe9b6c7aaL); 973 R1(A,B,C,D,X[ 5], 5,0xd62f105dL); 974 R1(D,A,B,C,X[10], 9,0x02441453L); 975 R1(C,D,A,B,X[15],14,0xd8a1e681L); 976 R1(B,C,D,A,X[ 4],20,0xe7d3fbc8L); 977 R1(A,B,C,D,X[ 9], 5,0x21e1cde6L) [all...] |
/external/chromium_org/third_party/boringssl/mac-x86/crypto/md5/ |
md5-586.S | 190 # R1 section 191 # R1 16 201 # R1 17 211 # R1 18 221 # R1 19 231 # R1 20 241 # R1 21 251 # R1 22 261 # R1 23 271 # R1 24 [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 47 bool SelectADDRrr(SDValue N, SDValue &R1, SDValue &R2); 118 bool SparcDAGToDAGISel::SelectADDRrr(SDValue Addr, SDValue &R1, SDValue &R2) { 132 R1 = Addr.getOperand(0); 137 R1 = Addr;
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/external/llvm/lib/Target/ARM/ |
ARMCallingConv.h | 31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; 75 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; 76 static const MCPhysReg ShadowRegList[] = { ARM::R0, ARM::R1 }; 77 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; 127 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 };
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/external/llvm/lib/Target/R600/ |
AMDGPUISelDAGToDAG.cpp | 56 bool SelectADDRParam(SDValue Addr, SDValue& R1, SDValue& R2); 57 bool SelectADDR(SDValue N, SDValue &R1, SDValue &R2); 58 bool SelectADDR64(SDValue N, SDValue &R1, SDValue &R2); 154 SDValue Addr, SDValue& R1, SDValue& R2) { 158 R1 = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32); 161 R1 = Addr; 165 R1 = Addr.getOperand(0); 168 R1 = Addr; 174 bool AMDGPUDAGToDAGISel::SelectADDR(SDValue Addr, SDValue& R1, SDValue& R2) { 179 return SelectADDRParam(Addr, R1, R2) [all...] |
/external/compiler-rt/lib/msandr/ |
msandr.cc | 273 reg_id_t R1; 278 // base for R1. 280 R1 = opnd_get_base(op); 282 // Otherwise, we need to compute the addr into R1. 285 R1 = DR_REG_XAX; 287 CHECK(reg_is_pointer_sized(R1)); // otherwise R2 may be wrong. 296 CHECK((R2 <= DR_REG_R15) && R1 != R2); 298 // Save the current values of R1 and R2. 299 dr_save_reg(drcontext, bb, instr, R1, SPILL_SLOT_1); 304 CHECK(drutil_insert_get_mem_addr(drcontext, bb, instr, op, R1, R2)) [all...] |
/external/libhevc/decoder/arm/ |
ihevcd_fmt_conv_420sp_to_rgba8888.s | 57 @* R1 pubUV * 95 @//R1 - UV PTR 111 @PLD [R1] 158 VLD1.8 {D2,D3},[R1]! @//LOAD 8 VALUES OF UV 185 VLD1.8 {D2,D3},[R1]! @//LOAD 8 VALUES OF U 189 PLD [R1] 437 ADD R1,R1,R11 @// adjust u pointer
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/art/compiler/jni/quick/arm/ |
calling_convention_arm.cc | 94 entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R1)); 183 R0, R1, R2, R3
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/external/llvm/lib/Target/Hexagon/ |
HexagonVarargsCallingConvention.h | 53 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4, 109 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
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/libcore/luni/src/test/java/libcore/java/lang/ |
ClassCastExceptionTest.java | 82 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1, 87 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
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/external/openssl/crypto/md4/ |
md4_locl.h | 106 #define R1(a,b,c,d,k,s,t) { \
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/external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime.Tests/ |
Antlr.Runtime.Tree.Tests.pas | 332 R0, R1, Dup: ICommonTree; 338 R1 := TCommonTree.Create(TCommonToken.Create(102)); 339 R0.AddChild(R1); 340 R1.AddChild(TCommonTree.Create(TCommonToken.Create(103))); 343 R1.AddChild(R2); 841 R0, R1, R2: ITree; 849 R1 := TCommonTree.Create(TCommonToken.Create(102)); 850 R0.AddChild(R1); 851 R1.AddChild(TCommonTree.Create(TCommonToken.Create(103))); 854 R1.AddChild(R2) [all...] |
/external/chromium_org/third_party/webrtc/base/ |
sha1.cc | 123 // (R0+R1), R2, R3, R4 are the different operations used in SHA1. 127 #define R1(v, w, x, y, z, i) \ 184 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/ppp/pppd/ |
sha1.c | 34 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 36 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 72 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/valgrind/main/none/tests/ |
sha1_test.c | 92 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 94 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 131 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/wpa_supplicant_8/src/crypto/ |
sha1-internal.c | 140 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 144 #define R1(v,w,x,y,z,i) \ 199 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/clang/lib/ARCMigrate/ |
TransformActions.cpp | 47 SourceRange R1, R2; 212 if (!canRemoveRange(act.R1)) 221 if (!canReplaceRange(act.R1, act.R2)) 254 commitRemove(act.R1); 260 commitReplace(act.R1, act.R2); 266 commitIncreaseIndentation(act.R1, act.Loc); 269 commitClearDiagnostic(act.DiagIDs, act.R1); 309 data.R1 = range; 333 data.R1 = range; 363 data.R1 = range [all...] |
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/ |
idctllm_altivec.asm | 14 .macro load_c V, LABEL, OFF, R0, R1 16 la \R1, \LABEL@l(\R0) 17 lvx \V, \OFF, \R1 135 stwu r1,-416(r1) ;# create space on the stack 137 stvx v0, 0, r1 138 lwz r6, 0(r1) 140 lwz r6, 4(r1) 145 lwz r6, 8(r1) 147 lwz r6, 12(r1) [all...] |
/external/chromium_org/v8/third_party/fdlibm/ |
fdlibm.js | 538 // we define R1(r*r) by 539 // r*(exp(r)+1)/(exp(r)-1) = 2+ r^2/6 * R1(r*r) 541 // R1(r**2) = 6/r *((exp(r)+1)/(exp(r)-1) - 2/r) 545 // a polynomial of degree 5 in r*r to approximate R1. The 548 // R1(z) ~ 1.0 + Q1*z + Q2*z**2 + Q3*z**3 + Q4*z**4 + Q5*z**5 557 // | 1.0+Q1*z+...+Q5*z - R1(z) | <= 2 563 // r r [ 3 - (R1 + R1*r/2) ] 565 // 2 2 [ 6 - r*(3 - R1*r/2) ] 574 // ({ ( r [ R1 - (3 - R1*r/2) ] ) } r 674 var r1 = 1 + hxs * (KEXPM1(0) + hxs * (KEXPM1(1) + hxs * variable [all...] |
/external/libvpx/libvpx/vp8/common/ppc/ |
idctllm_altivec.asm | 14 .macro load_c V, LABEL, OFF, R0, R1 16 la \R1, \LABEL@l(\R0) 17 lvx \V, \OFF, \R1 135 stwu r1,-416(r1) ;# create space on the stack 137 stvx v0, 0, r1 138 lwz r6, 0(r1) 140 lwz r6, 4(r1) 145 lwz r6, 8(r1) 147 lwz r6, 12(r1) [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
idctllm_altivec.asm | 14 .macro load_c V, LABEL, OFF, R0, R1 16 la \R1, \LABEL@l(\R0) 17 lvx \V, \OFF, \R1 135 stwu r1,-416(r1) ;# create space on the stack 137 stvx v0, 0, r1 138 lwz r6, 0(r1) 140 lwz r6, 4(r1) 145 lwz r6, 8(r1) 147 lwz r6, 12(r1) [all...] |