/external/checkpolicy/ |
policy_scan.l | 198 r1 | 199 R1 { return(R1); }
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/external/chromium_org/media/base/simd/ |
linear_scale_yuv_to_rgb_mmx_x64.asm | 37 PROLOGUE 7, 7, 3, Y, U, V, ARGB, WIDTH, SOURCE_DX, R1 45 %define COMPL R1
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scale_yuv_to_rgb_sse2_x64.asm | 37 PROLOGUE 7, 7, 3, Y, U, V, ARGB, WIDTH, SOURCE_DX, R1
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/external/openssl/crypto/md5/ |
md5_locl.h | 117 #define R1(a,b,c,d,k,s,t) { \
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/external/clang/lib/AST/ |
Expr.cpp | [all...] |
/art/compiler/utils/arm/ |
managed_register_arm.h | 117 if (reg_low == R1) { 207 if (r_low != R1) { // not the dalvik special case
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/external/chromium_org/v8/tools/push-to-trunk/ |
releases.py | 78 The ranges are comma-separated, each range has the form R1:R2. The newest 79 entry is the only one of the form R1, as there is no end range.
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/dalvik/libdex/ |
sha1.cpp | 125 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 127 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 163 R0(a,b,c,d,e,15); R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); 164 R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); R2(a,b,c,d,e,20);
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/external/chromium_org/third_party/smhasher/src/ |
sha1.cpp | 106 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 108 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 138 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/frameworks/compile/libbcc/lib/Support/ |
sha1.c | 123 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 125 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 161 R0(a,b,c,d,e,15); R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); 162 R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); R2(a,b,c,d,e,20);
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/art/compiler/optimizing/ |
code_generator_arm.h | 32 static constexpr Register kParameterCoreRegisters[] = { R1, R2, R3 };
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/art/runtime/arch/arm/ |
quick_method_frame_info_arm.h | 32 (1 << art::arm::R1) | (1 << art::arm::R2) | (1 << art::arm::R3);
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 41 case R0: case R1: case R2: case R3:
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
Deemph_32_opt.s | 27 @x_lo RN R1 39 LDRSH r7, [r1], #2 @load x_lo[0] 52 LDRSH r7, [r1], #2 @load x_lo[1] 70 LDRSH r7, [r1], #2 80 LDRSH r7, [r1], #2
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
Deemph_32_neon.s | 27 @x_lo RN R1 39 LDRSH r7, [r1], #2 @load x_lo[0] 52 LDRSH r7, [r1], #2 @load x_lo[1] 70 LDRSH r7, [r1], #2 80 LDRSH r7, [r1], #2
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/external/llvm/include/llvm/MC/ |
MCDwarf.h | 342 MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2) 343 : Operation(Op), Label(L), Register(R1), Register2(R2) {
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/external/valgrind/main/coregrind/m_sigframe/ |
sigframe-arm-linux.c | 139 SC2(r1,R1); 318 REST(r1,R1);
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/bionic/libc/upstream-netbsd/common/lib/libc/hash/sha1/ |
sha1.c | 65 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 68 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 101 #define nR1(v,w,x,y,z,i) R1(*v,*w,*x,*y,*z,i) 187 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/ppc/ |
fdct_altivec.asm | 15 .macro load_c V, LABEL, OFF, R0, R1 17 la \R1, \LABEL@l(\R0) 18 lvx \V, \OFF, \R1 32 stwu r1,-32(r1) ;# create space on the stack 49 addi r1, r1, 32 ;# recover stack 116 addi r8, r1, 0 145 addi r8, r1, 0 168 addi r8, r1, [all...] |
/external/libvpx/libvpx/vp8/encoder/ppc/ |
fdct_altivec.asm | 15 .macro load_c V, LABEL, OFF, R0, R1 17 la \R1, \LABEL@l(\R0) 18 lvx \V, \OFF, \R1 32 stwu r1,-32(r1) ;# create space on the stack 49 addi r1, r1, 32 ;# recover stack 116 addi r8, r1, 0 145 addi r8, r1, 0 168 addi r8, r1, [all...] |
/external/qemu/distrib/ext4_utils/src/ |
sha1.c | 51 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 54 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 77 #define nR1(v,w,x,y,z,i) R1(*v,*w,*x,*y,*z,i) 165 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ppc/ |
fdct_altivec.asm | 15 .macro load_c V, LABEL, OFF, R0, R1 17 la \R1, \LABEL@l(\R0) 18 lvx \V, \OFF, \R1 32 stwu r1,-32(r1) ;# create space on the stack 49 addi r1, r1, 32 ;# recover stack 116 addi r8, r1, 0 145 addi r8, r1, 0 168 addi r8, r1, [all...] |
/system/extras/ext4_utils/ |
sha1.c | 51 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 54 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); 77 #define nR1(v,w,x,y,z,i) R1(*v,*w,*x,*y,*z,i) 165 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
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/external/eigen/Eigen/src/Core/products/ |
GeneralBlockPanelKernel.h | 581 ResScalar* r1 = r0 + resStride; local 582 ResScalar* r2 = r1 + resStride; 586 prefetch(r1+16); 757 ResPacket R0, R1, R2, R3, R4, R5, R6; 761 R1 = ploadu<ResPacket>(r1); 765 R5 = ploadu<ResPacket>(r1 + ResPacketSize); 771 traits.acc(C1, alphav, R1); 779 pstoreu(r1, R1); 939 ResScalar* r1 = r0 + resStride; local [all...] |
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
org.apache.lucene.analysis_1.9.1.v20100518-1140.jar | |