/external/llvm/lib/Target/X86/InstPrinter/ |
X86IntelInstPrinter.h | 30 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 35 static const char *getRegisterName(unsigned RegNo);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 514 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); 519 return RegNo; 524 return 2 * RegNo; [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 144 unsigned RegNo; // For MO_Register. 164 // Register number is in SmallContents.RegNo. 266 return SmallContents.RegNo; 595 Op.SmallContents.RegNo = Reg;
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MachineInstrBuilder.h | 64 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0, 68 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
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/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 83 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 189 unsigned getReg(int RC, int RegNo); 191 unsigned getGPR(int RegNo); 297 /// Warn if RegNo is the current assembler temporary. 298 void WarnIfAssemblerTemporary(int RegNo, SMLoc Loc); [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64.h | 201 int RegNo() const;
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/external/llvm/lib/MC/MCParser/ |
COFFAsmParser.cpp | 140 bool ParseSEHRegisterNumber(unsigned &RegNo); 730 bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) { 756 RegNo = SEHRegNo; 764 RegNo = n;
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/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.h | 30 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 34 static const char *getRegisterName(unsigned RegNo);
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/external/llvm/lib/Target/Mips/InstPrinter/ |
MipsInstPrinter.cpp | 75 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 76 OS << '$' << StringRef(getRegisterName(RegNo)).lower();
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 83 unsigned getHWReg(unsigned regNo) const; 610 unsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const { 613 HWReg = getHWRegIndex(RegNo); 614 if (AMDGPUMCRegisterClasses[AMDGPU::R600_CReg32RegClassID].contains(RegNo)) {
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 83 unsigned getHWReg(unsigned regNo) const; 610 unsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const { 613 HWReg = getHWRegIndex(RegNo); 614 if (AMDGPUMCRegisterClasses[AMDGPU::R600_CReg32RegClassID].contains(RegNo)) {
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/external/llvm/lib/CodeGen/ |
MachineRegisterInfo.cpp | 320 bool MachineRegisterInfo::hasOneNonDBGUse(unsigned RegNo) const { 321 use_nodbg_iterator UI = use_nodbg_begin(RegNo);
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MachineInstr.cpp | 59 SmallContents.RegNo = Reg; 65 SmallContents.RegNo = Reg; 144 SmallContents.RegNo = Reg; [all...] |
/external/clang/lib/Basic/ |
Targets.cpp | 911 int getEHDataRegisterNumber(unsigned RegNo) const override { 912 if (RegNo == 0) return 3; 913 if (RegNo == 1) return 4; [all...] |
/external/llvm/lib/Target/SystemZ/AsmParser/ |
SystemZAsmParser.cpp | 343 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 583 bool SystemZAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 589 RegNo = SystemZMC::GR64Regs[Reg.Num]; 591 RegNo = SystemZMC::FP64Regs[Reg.Num];
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 505 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); 506 return RegNo;
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/external/llvm/lib/Target/Sparc/ |
SparcAsmPrinter.cpp | 62 static const char *getRegisterName(unsigned RegNo) { 63 return SparcInstPrinter::getRegisterName(RegNo);
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/external/clang/include/clang/Basic/ |
TargetInfo.h | 733 virtual int getEHDataRegisterNumber(unsigned RegNo) const {
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/external/llvm/lib/Target/NVPTX/ |
NVPTXAsmPrinter.h | 287 static const char *getRegisterName(unsigned RegNo);
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NVPTXAsmPrinter.cpp | 830 unsigned RegNo = MI->getOperand(0).getReg(); 832 if (TRI->isVirtualRegister(RegNo)) { 834 getVirtualRegisterName(RegNo)); 837 TM.getRegisterInfo()->getName(RegNo)); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 270 unsigned RegNo = TRI->getEncodingValue(I->first); 271 if (VRRegNo[RegNo] == I->first) // If this really is a vector reg. 272 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked. 286 unsigned RegNo = TRI->getEncodingValue(MO.getReg()); 287 UsedRegMask &= ~(1 << (31-RegNo)); [all...] |
/external/llvm/utils/TableGen/ |
RegisterInfoEmitter.cpp | 413 int RegNo = I->second[i]; 414 if (RegNo == -1) // -1 is the default value, don't emit a mapping. 417 OS << " { " << getQualifiedName(I->first) << ", " << RegNo [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.cpp | 50 void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 52 OS << getRegisterName(RegNo); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGISel.cpp | [all...] |