| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 590 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
604 if (N.getOpcode() != ISD::SELECT_CC ||
[all...] |
| LegalizeVectorOps.cpp | 266 case ISD::SELECT_CC:
[all...] |
| TargetLowering.cpp | 116 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
286 // FIXME: ISD::SELECT, ISD::SELECT_CC
584 case ISD::SELECT_CC:
[all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 94 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 712 return getNode(ISD::SELECT_CC, DL, True.getValueType(),
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 458 setOperationAction(ISD::SELECT_CC , MVT::f32, Expand);
459 setOperationAction(ISD::SELECT_CC , MVT::f64, Expand);
460 setOperationAction(ISD::SELECT_CC , MVT::f80, Expand);
461 setOperationAction(ISD::SELECT_CC , MVT::i8, Expand);
462 setOperationAction(ISD::SELECT_CC , MVT::i16, Expand);
463 setOperationAction(ISD::SELECT_CC , MVT::i32, Expand);
464 setOperationAction(ISD::SELECT_CC , MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 120 setOperationAction(ISD::SELECT_CC, VT, Expand);
558 setTargetDAGCombine(ISD::SELECT_CC);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 127 // Expand SELECT(C, A, B) into SELECT_CC(X, 0, A, B, NE).
130 // Lower SELECT_CC and BR_CC into separate comparisons and branches.
131 setOperationAction(ISD::SELECT_CC, VT, Custom);
[all...] |
