/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDGPUISelLowering.cpp | 208 ISD::SETEQ); 222 ISD::SETEQ); 259 Quotient, Quotient_A_One, ISD::SETEQ); 263 Quotient_S_One, Div, ISD::SETEQ); 275 Remainder, Remainder_S_Den, ISD::SETEQ); 279 Remainder_A_Den, Rem, ISD::SETEQ);
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R600ISelLowering.cpp | 450 case ISD::SETEQ:
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUISelLowering.cpp | 208 ISD::SETEQ); 222 ISD::SETEQ); 259 Quotient, Quotient_A_One, ISD::SETEQ); 263 Quotient_S_One, Div, ISD::SETEQ); 275 Remainder, Remainder_S_Den, ISD::SETEQ); 279 Remainder_A_Den, Rem, ISD::SETEQ);
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R600ISelLowering.cpp | 450 case ISD::SETEQ:
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/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | 127 case ISD::SETEQ: [all...] |
SelectionDAGDumper.cpp | 314 case ISD::SETEQ: return "seteq";
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LegalizeIntegerTypes.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
LegalizeFloatTypes.cpp | [all...] |
SelectionDAG.cpp | 281 /// if the operation does not depend on the sign of the input (setne and seteq). 285 case ISD::SETEQ: 340 case ISD::SETOEQ: // SETEQ & SETU[LG]E 341 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 642 CCs[RTLIB::OEQ_F32] = ISD::SETEQ; 643 CCs[RTLIB::OEQ_F64] = ISD::SETEQ; 644 CCs[RTLIB::OEQ_F128] = ISD::SETEQ; 663 CCs[RTLIB::O_F32] = ISD::SETEQ; 664 CCs[RTLIB::O_F64] = ISD::SETEQ; 665 CCs[RTLIB::O_F128] = ISD::SETEQ; [all...] |
Analysis.cpp | 175 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; 190 case ICmpInst::ICMP_EQ: return ISD::SETEQ;
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/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 499 if (CC == ISD::SETEQ || CC == ISD::SETNE) { 501 // SETEQ/SETNE comparison with 16-bit immediate, fold it. 540 if (CC == ISD::SETEQ || CC == ISD::SETNE) { 542 // SETEQ/SETNE comparison with 16-bit immediate, fold it. 599 case ISD::SETEQ: return PPC::PRED_EQ; 630 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ 656 case ISD::SETEQ: 760 case ISD::SETEQ: { 789 case ISD::SETEQ: 836 case ISD::SETEQ [all...] |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
AMDGPUISelLowering.cpp | [all...] |
R600ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 207 setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ); 226 setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ); 275 { RTLIB::UNE_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ }, 281 { RTLIB::O_F64, "__aeabi_dcmpun", CallingConv::ARM_AAPCS, ISD::SETEQ }, 293 { RTLIB::UNE_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ }, 299 { RTLIB::O_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, ISD::SETEQ }, [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 821 case ISD::SETEQ: [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |