| /external/chromium_org/content/browser/service_worker/ |
| service_worker_register_job.cc | 177 case STORE:
400 SetPhase(STORE);
|
| /frameworks/opt/telephony/src/java/com/google/android/mms/pdu/ |
| PduHeaders.java | 65 public static final int STORE = 0xA2;
130 * X-Mms-Store |
310 * X-Mms-Store-Status field types.
372 case STORE:
|
| PduParser.java | 62 * Store pdu headers
67 * Store pdu parts.
72 * Store the "type" parameter in "Content-Type" header field.
77 * Store the "start" parameter in "Content-Type" header field.
302 case PduHeaders.STORE:
740 /* not store this header filed in "headers",
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 89 setOperationAction(ISD::STORE, MVT::v8i32, Custom);
90 setOperationAction(ISD::STORE, MVT::v16i32, Custom);
98 setOperationAction(ISD::STORE, MVT::i1, Custom);
99 setOperationAction(ISD::STORE, MVT::i32, Custom);
100 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
101 setOperationAction(ISD::STORE, MVT::v4i32, Custom);
176 // We only support LOAD/STORE and vector manipulation ops for vectors
186 case ISD::STORE:
632 case ISD::STORE: return LowerSTORE(Op, DAG);
639 //XXX: Hardcoded we only use two to store the pointer to the parameters
[all...] |
| R600ISelLowering.cpp | 129 setOperationAction(ISD::STORE, MVT::i8, Custom);
130 setOperationAction(ISD::STORE, MVT::i32, Custom);
131 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
132 setOperationAction(ISD::STORE, MVT::v4i32, Custom);
580 case ISD::STORE: return LowerSTORE(Op, DAG);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 143 case ISD::STORE: {
225 // If an indexed floating point load/store can be emitted, return false.
|
| MipsSEISelLowering.cpp | 74 setOperationAction(ISD::STORE, VecTys[i], Legal);
140 setOperationAction(ISD::STORE, MVT::i32, Custom);
152 setOperationAction(ISD::STORE, MVT::f64, Custom);
252 setOperationAction(ISD::STORE, Ty, Legal);
300 setOperationAction(ISD::STORE, Ty, Legal);
360 case ISD::STORE: return lowerSTORE(Op, DAG);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| /external/chromium_org/v8/src/ |
| hydrogen-instructions.cc | [all...] |
| hydrogen.cc | 35 #include "src/hydrogen-store-elimination.h"
2913 HStoreKeyed* store = Add<HStoreKeyed>(to_elements, key, element, kind); local
2917 HStoreKeyed* store = Add<HStoreKeyed>(to_elements, key, element, kind); local
5612 HInstruction* store; local
8444 HStoreKeyed* store = Add<HStoreKeyed>( local
11174 HInstruction* store = Add<HStoreKeyed>(object_elements, key_constant, local
11268 HStoreContextSlot* store = Add<HStoreContextSlot>( local
11306 HStoreContextSlot* store = Add<HStoreContextSlot>( local
[all...] |
| code-stubs-hydrogen.cc | 472 // Store the map
476 // Store the payload (smi elements kind)
501 // Store an empty fixed array for the code dependency.
516 // TODO(mvstanton): This is a store to a weak pointer, which we may want to
519 // an initial write barrier backed store makes this pointer strong until the
737 // Store the double value into it.
778 casted_stub()->elements_kind(), STORE, NEVER_RETURN_HOLE,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 268 case ISD::STORE: return "store";
|
| LegalizeFloatTypes.cpp | 634 case ISD::STORE: Res = SoftenFloatOp_STORE(N, OpNo); break;
[all...] |
| LegalizeVectorOps.cpp | 208 } else if (Op.getOpcode() == ISD::STORE) {
612 // Store Stride in bytes
622 SDValue Store = DAG.getTruncStore(Chain, dl, Ex, BasePTR,
629 Stores.push_back(Store);
[all...] |
| LegalizeVectorTypes.cpp | 422 case ISD::STORE:
499 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
500 /// scalarized, it must be <1 x ty>. Just store the element.
502 assert(N->isUnindexed() && "Indexed store of one-element vector?");
801 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
804 // Store the new subvector into the specified index.
808 Store = DAG.getStore(Store, dl, SubVec, SubVecPtr, MachinePointerInfo(),
812 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
822 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo()
[all...] |
| SelectionDAG.cpp | 485 case ISD::STORE: {
[all...] |
| LegalizeDAG.cpp | 304 /// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
323 // same size, then a (misaligned) int store.
331 // Do a (aligned) store to a stack slot, then copy from the stack slot
345 // Perform the original store, only redirected to the stack slot.
346 SDValue Store = DAG.getTruncStore(Chain, dl,
356 SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
359 // Store it to the final location. Remember the store.
371 // The last store may be partial. Do a truncating store. On big-endia
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 139 setOperationAction(ISD::STORE, MVT::i32, Custom);
178 setTargetDAGCombine(ISD::STORE);
215 case ISD::STORE: return LowerSTORE(Op, DAG);
505 assert(!ST->isTruncatingStore() && "Unexpected store type");
506 assert(ST->getMemoryVT() == MVT::i32 && "Unexpected store EVT");
512 // Leave aligned store alone.
771 // Store the incremented VAList to the legalized pointer
[all...] |
| /external/mockito/cglib-and-asm/src/org/mockito/asm/ |
| MethodWriter.java | 818 * intVal field of this item to store this variation, once it
[all...] |
| /frameworks/opt/telephony/src/java/android/provider/ |
| Telephony.java | 781 * Set by BroadcastReceiver to indicate insufficient memory to store
[all...] |
| /packages/providers/TelephonyProvider/src/com/android/providers/telephony/ |
| MmsProvider.java | 411 // text/plain and app application/smil store their "data" inline in the
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 107 // always lower memset, memcpy, and memmove intrinsics to load/store
201 // Turn FP truncstore into trunc + store.
204 // PTX does not support load / store predicate registers
206 setOperationAction(ISD::STORE, MVT::i1, Custom);
231 setOperationAction(ISD::STORE, VT, Custom);
760 // V1 store
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 43 cl::desc("disable preincrement load/store generation on PPC"), cl::Hidden);
49 cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden);
88 // PowerPC has pre-inc load and store's.
115 // PowerPC does not support direct load / store of condition registers
117 setOperationAction(ISD::STORE, MVT::i1, Custom);
426 setOperationAction(ISD::STORE, VT, Promote);
427 AddPromotedToType (ISD::STORE, VT, MVT::v4i32);
491 setOperationAction(ISD::STORE , MVT::v4i32, Legal);
573 setOperationAction(ISD::STORE, MVT::v2f64, Legal);
594 setOperationAction(ISD::STORE, MVT::v2i64, Promote)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 47 Align(cl::desc("Load/store alignment support"),
307 // load, floating-point truncating stores, or v2i32->v2i16 truncating store.
358 setTargetDAGCombine(ISD::STORE);
486 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote);
487 AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i32);
492 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote);
493 AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i64);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 495 // Store remaining ArgRegs to the stack if this is a varargs function.
776 // store SRet argument in %sp+64
792 // if it is double-word aligned, just store.
805 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl,
809 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr,
815 SDValue Lo = DAG.getLoad(MVT::i32, dl, Store, StackPtr,
[all...] |
