| /external/llvm/lib/Target/AArch64/ |
| AArch64A57FPLoadBalancing.cpp | 110 const AArch64InstrInfo *TII;
301 TII = TM.getSubtarget<AArch64Subtarget>().getInstrInfo();
|
| AArch64InstrInfo.cpp | 667 const TargetInstrInfo *TII = TM->getInstrInfo();
675 Instr->getRegClassConstraint(OpIdx, TII, TRI);
[all...] |
| AArch64CollectLOH.cpp | [all...] |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 282 const MCInstrDesc &MCID = DAG.TII->get(Opcode);
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| X86ISelDAGToDAG.cpp | 568 const TargetInstrInfo *TII = TM.getInstrInfo();
573 TII->get(CallOp)).addExternalSymbol("__main");
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 555 const TargetInstrInfo *TII; // Target instruction information
|
| MachineRegisterInfo.h | 765 const TargetInstrInfo &TII);
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegAllocGreedy.cpp | 111 const TargetInstrInfo *TII;
[all...] |
| SplitKit.cpp | 50 TII(*MF.getTarget().getInstrInfo()),
332 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
450 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
[all...] |
| LiveIntervalAnalysis.cpp | 115 TII = TM->getInstrInfo();
[all...] |
| ScheduleDAGInstrs.cpp | 67 SchedModel.init(*ST.getSchedModel(), &ST, TII);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| ARMISelDAGToDAG.cpp | 427 const ARMBaseInstrInfo *TII = static_cast<const ARMBaseInstrInfo *>(
430 const MCInstrDesc &MCID = TII->get(Use->getMachineOpcode());
449 return TII->isFpMLxInstruction(Opcode);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 679 const SystemZInstrInfo *TII = getInstrInfo();
683 if (TII->isRxSBGMask(Mask, RxSBG.BitSize, RxSBG.Start, RxSBG.End)) {
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 414 const TargetInstrInfo &TII = *TM.getInstrInfo();
457 RegInfo->EmitLiveInCopies(EntryMBB, TRI, TII);
498 TII.get(TargetOpcode::DBG_VALUE),
520 TII.get(TargetOpcode::DBG_VALUE),
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILCFGStructurizer.cpp | 1903 const AMDGPUInstrInfo *tii = local
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3068 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3088 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3104 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3119 const AMDGPUInstrInfo *tii = local
3132 const AMDGPUInstrInfo *tii = local
3152 const AMDGPUInstrInfo *tii = local
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILCFGStructurizer.cpp | 1903 const AMDGPUInstrInfo *tii = local
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3068 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3088 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3104 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); local
3119 const AMDGPUInstrInfo *tii = local
3132 const AMDGPUInstrInfo *tii = local
3152 const AMDGPUInstrInfo *tii = local
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelDAGToDAG.cpp | 51 const R600InstrInfo *TII);
|
| /libcore/harmony-tests/src/test/java/org/apache/harmony/tests/java/util/ |
| ArraysTest.java | [all...] |
