/external/llvm/lib/Target/Mips/ |
MipsTargetMachine.h | 31 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, 77 MipsebTargetMachine(const Target &T, StringRef TT, 88 MipselTargetMachine(const Target &T, StringRef TT,
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MipsSubtarget.cpp | 63 static StringRef selectMipsCPU(Triple TT, StringRef CPU) { 65 if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) 105 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, 108 : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32), 117 TargetTriple(TT), 170 if (TT.find("linux") == std::string::npos)
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/external/llvm/lib/Target/NVPTX/ |
NVPTXTargetMachine.h | 34 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, 83 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU, 92 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
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/external/llvm/lib/Target/PowerPC/ |
PPCTargetMachine.h | 30 PPCTargetMachine(const Target &T, StringRef TT, 74 PPC32TargetMachine(const Target &T, StringRef TT, 85 PPC64TargetMachine(const Target &T, StringRef TT,
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64MCTargetDesc.cpp | 44 createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { 50 InitAArch64MCSubtargetInfo(X, TT, CPU, FS); 61 StringRef TT) { 62 Triple TheTriple(TT); 69 MAI = new AArch64MCAsmInfoELF(TT); 80 static MCCodeGenInfo *createAArch64MCCodeGenInfo(StringRef TT, Reloc::Model RM, 83 Triple TheTriple(TT); 126 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 131 Triple TheTriple(TT);
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AArch64MCAsmInfo.cpp | 67 AArch64MCAsmInfoELF::AArch64MCAsmInfoELF(StringRef TT) { 68 Triple T(TT);
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/external/clang/lib/StaticAnalyzer/Checkers/ |
BoolAssignmentChecker.cpp | 46 if (const TypedefType *TT = Ty->getAs<TypedefType>()) 47 return TT->getDecl()->getName() == "BOOL" || // Objective-C 48 TT->getDecl()->getName() == "_Bool" || // stdbool.h < C99 49 TT->getDecl()->getName() == "Boolean"; // MacTypes.h
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
AMDGPUMCAsmInfo.cpp | 14 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(StringRef &TT) : MCAsmInfo() {
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AMDGPUMCTargetDesc.h | 44 StringRef TT, StringRef CPU);
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
SparcMCTargetDesc.h | 40 StringRef TT,
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SparcMCAsmInfo.cpp | 23 SparcELFMCAsmInfo::SparcELFMCAsmInfo(StringRef TT) { 25 Triple TheTriple(TT);
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/external/llvm/lib/Target/XCore/ |
XCoreSubtarget.h | 44 XCoreSubtarget(const std::string &TT, const std::string &CPU,
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/external/llvm/include/llvm/Support/ |
TargetRegistry.h | 60 MCRelocationInfo *createMCRelocationInfo(StringRef TT, MCContext &Ctx); 62 MCSymbolizer *createMCSymbolizer(StringRef TT, LLVMOpInfoCallback GetOpInfo, 83 StringRef TT); 84 typedef MCCodeGenInfo *(*MCCodeGenInfoCtorFnTy)(StringRef TT, 90 typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(StringRef TT); 91 typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(StringRef TT, 95 StringRef TT, 106 StringRef TT, 127 StringRef TT, 144 typedef MCRelocationInfo *(*MCRelocationInfoCtorTy)(StringRef TT, [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : 24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
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AMDGPUTargetMachine.cpp | 41 AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT, 48 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel), 49 Subtarget(TT, CPU, FS),
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/external/clang/test/CodeGenCXX/ |
temp-order.cpp | 21 TempTracker &TT; 26 : TT(_TT), P(_P), Truth(_Truth) {} 27 A(const A &RHS) : TT(RHS.TT), P(RHS.P), Truth(RHS.Truth) { RHS.P = 0; } 30 TT.Product *= pow(P, ++TT.Index); 34 TT = RHS.TT; 46 TempTracker tt; local 48 A a(tt, 2) 58 TempTracker tt; local 70 TempTracker tt; local 82 TempTracker tt; local 96 TempTracker tt; local 108 TempTracker tt; local 122 TempTracker tt; local 134 TempTracker tt; local 143 TempTracker tt; local [all...] |
/external/clang/test/SemaTemplate/ |
instantiate-field.cpp | 59 template < typename TT > struct BidirectionalIterator 69 TT i;
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temp_arg_template.cpp | 50 template <template<typename,int> class TT, typename T, int N> 51 int operator<<(int, TT<T, N> a) { // expected-note{{candidate template ignored}}
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instantiate-function-params.cpp | 24 template < typename TT > struct InputIterator { 27 template < typename TT > struct ForwardIterator : InputIterator<TT> { // expected-note {{in instantiation}}
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/external/llvm/lib/Target/Hexagon/ |
HexagonSubtarget.cpp | 74 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS, 76 : HexagonGenSubtargetInfo(TT, CPU, FS), CPUString(CPU.str()),
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsAsmBackend.cpp | 397 StringRef TT, 399 return new MipsAsmBackend(T, Triple(TT).getOS(), 405 StringRef TT, 407 return new MipsAsmBackend(T, Triple(TT).getOS(), 413 StringRef TT, 415 return new MipsAsmBackend(T, Triple(TT).getOS(), 421 StringRef TT, 423 return new MipsAsmBackend(T, Triple(TT).getOS(),
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/external/llvm/lib/Target/Sparc/ |
SparcSubtarget.cpp | 78 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, 81 : SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : 24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
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/external/llvm/lib/Target/AArch64/ |
AArch64TargetMachine.cpp | 84 AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT, 90 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 91 Subtarget(TT, CPU, FS, *this, LittleEndian) { 98 AArch64leTargetMachine(const Target &T, StringRef TT, 102 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} 107 AArch64beTargetMachine(const Target &T, StringRef TT, 111 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
SystemZMCTargetDesc.cpp | 98 StringRef TT) { 99 MCAsmInfo *MAI = new SystemZMCAsmInfo(TT); 114 static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) { 120 static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT, 124 InitSystemZMCSubtargetInfo(X, TT, CPU, FS); 128 static MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM, 184 static MCStreamer *createSystemZMCObjectStreamer(const Target &T, StringRef TT,
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