/external/llvm/test/MC/Mips/mips2/ |
invalid-mips32r2.s | 48 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 51 mthc1 $zero,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 55 nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips3.s | 10 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips4.s | 12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips5.s | 12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/chromium_org/third_party/mesa/src/src/mesa/sparc/ |
sparc_matrix.h | 35 #define M0 %f16
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/external/chromium_org/v8/test/mjsunit/harmony/ |
block-let-crankshaft.js | 34 f15, f16, f17, f18, f19, f20, f21, f22, f23, f24, f25, f26, 114 function f16() { function
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/external/clang/test/Analysis/ |
dead-stores.c | 153 int f16(int x) { function
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/external/clang/test/CodeGen/ |
x86_32-arguments-darwin.c | 78 // CHECK: <2 x i64> @f16() 90 T16 f16(void) { while (1) {} } function
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x86_64-arguments.c | 86 // CHECK: define void @f16({{.*}}, float %X) 87 void f16(float a, float b, float c, float d, float e, float f, float g, float h, function
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arm64-arguments.c | 69 // CHECK: define void @f16() 70 void f16(struct s8 a0) {} function
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/external/libunwind/src/ia64/ |
getcontext.S | 71 stf.spill [r8] = f16 // M3
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Ginstall_cursor.S | 78 ldf.fill f16 = [r16] // f16 restored (don't touch no more)
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/external/llvm/test/MC/SystemZ/ |
regs-bad.s | 221 #CHECK: .cfi_offset %f16,0 237 .cfi_offset %f16,0
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/external/mesa3d/src/mesa/sparc/ |
sparc_matrix.h | 35 #define M0 %f16
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/external/openssl/crypto/ |
ia64cpuid.S | 107 { .mfi; mov f16=f0 }
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/external/valgrind/main/none/tests/mips32/ |
MoveIns.stdout.exp | 18 mfc1 $s7, $f16 :: fs 1.496914, rt 0x3fbf9add 46 mtc1 $s7, $f16 :: fs 1.496914, rt 0x3fbf9add 74 mov.s $f15, $f16 :: fs 1752065.000000, rt 0x49d5e008 75 mov.s $f16, $f17 :: fs 0.000000, rt 0x0 101 mov.d $f14, $f16 ::fs 11600980417357008896.000000, rt 0xc732da7a 102 mov.d $f14, $f16 ::fs 97892595018733988536880335157198848.000000, rt 0x42080079 103 mov.d $f16, $f18 ::fs 96757042599808.125000, rt 0x49d5e008 104 mov.d $f16, $f18 ::fs 11600973572943642624.000000, rt 0x0
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/external/chromium_org/third_party/boringssl/src/crypto/perlasm/ |
sparcv9_modes.pl | 667 aes_eround01 %f16, %f14, %f2, %f4 671 camellia_f %f16, %f2, %f14, %f2 748 aes_eround01 %f16, %f14, %f2, %f8 750 aes_eround01 %f16, %f14, %f6, %f10 754 camellia_f %f16, %f2, %f14, %f2 755 camellia_f %f16, %f6, %f14, %f6 853 aes_eround01 %f16, %f14, %f2, %f8 855 aes_eround01 %f16, %f14, %f6, %f10 859 camellia_f %f16, %f2, %f14, %f2 860 camellia_f %f16, %f6, %f14, %f [all...] |
/external/chromium_org/v8/src/mips/ |
simulator-mips.h | 145 f16, f17, f18, f19, f20, f21, f22, f23, f24, f25, enumerator in enum:v8::internal::Simulator::FPURegister
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/external/chromium_org/v8/src/mips64/ |
simulator-mips64.h | 174 f16, f17, f18, f19, f20, f21, f22, f23, f24, f25, enumerator in enum:v8::internal::Simulator::FPURegister
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/external/valgrind/main/none/tests/ppc32/ |
test_dfp2.c | 37 register double f16 __asm__ ("fr16");
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/external/llvm/test/MC/Mips/mips1/ |
invalid-mips3.s | 14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/openssl/crypto/bn/asm/ |
ia64-mont.pl | 369 ni0=f16; ni1=f17; ni2=f18; ni3=f19; ni4=f20; ni5=f21; ni6=f22; ni7=f23; 389 stf.spill [sp]=f16,-16 835 { .mmi; ldf.fill f16=[r16],64
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/external/openssl/crypto/sha/asm/ |
sha1-sparcv9a.pl | 80 "%f8", "%f9","%f10","%f11","%f12","%f13","%f14","%f15","%f16"); 466 fpadd32 $VK_00_19,@X[0],%f16 474 std %f16,[$Xfer+0]
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/external/valgrind/main/memcheck/ |
mc_machine.c | [all...] |
/external/valgrind/main/memcheck/tests/ |
deep-backtrace.c | 16 int f16(int *p) { return f15(p); } function 17 int f17(int *p) { return f16(p); }
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