| /art/compiler/utils/x86/ |
| assembler_x86.h | 252 void movw(Register dst, const Address& src);
253 void movw(const Address& dst, Register src);
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| assembler_x86.cc | 232 void X86Assembler::movw(Register /*dst*/, const Address& /*src*/) { function in class:art::x86::X86Assembler
237 void X86Assembler::movw(const Address& dst, Register src) { function in class:art::x86::X86Assembler
[all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 296 void movw(CpuRegister dst, const Address& src);
297 void movw(const Address& dst, CpuRegister src);
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| assembler_x86_64.cc | 279 void X86_64Assembler::movw(CpuRegister /*dst*/, const Address& /*src*/) { function in class:art::x86_64::X86_64Assembler
284 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler
[all...] |
| /external/llvm/test/MC/ARM/ |
| diagnostics.s | 161 movw r9, 0x10000
164 @ Invalid 's' bit usage for MOVW
168 @ CHECK-ERRORS: error: instruction 'movw' can not set flags, but 's' suffix specified
489 movw r0, foo2
|
| basic-thumb2-instructions.s | [all...] |
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 826 __ movw(R4, 0); // 16 bit.
827 __ movw(R4, 0x34); // 16 bit.
828 __ movw(R9, 0x34); // 32 bit due to high register.
829 __ movw(R3, 0x1234); // 32 bit due to large value.
830 __ movw(R9, 0xffff); // 32 bit due to large value and high register.
[all...] |
| /art/compiler/optimizing/ |
| code_generator_x86_64.cc | [all...] |
| code_generator_x86.cc | [all...] |
| /external/chromium_org/v8/src/x64/ |
| assembler-x64.h | 714 void movw(Register dst, const Operand& src);
715 void movw(const Operand& dst, Register src);
716 void movw(const Operand& dst, Immediate imm);
[all...] |
| assembler-x64.cc | 1210 void Assembler::movw(Register dst, const Operand& src) { function in class:v8::internal::Assembler
1219 void Assembler::movw(const Operand& dst, Register src) { function in class:v8::internal::Assembler
1228 void Assembler::movw(const Operand& dst, Immediate imm) { function in class:v8::internal::Assembler
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32.cc | 676 void Arm32Assembler::movw(Register rd, uint16_t imm16, Condition cond) { function in class:art::arm::Arm32Assembler
[all...] |
| assembler_arm.h | 404 virtual void movw(Register rd, uint16_t imm16, Condition cond = AL) = 0;
|
| assembler_arm32.h | 84 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
|
| assembler_thumb2.cc | 1528 void Thumb2Assembler::movw(Register rd, uint16_t imm16, Condition cond) { function in class:art::arm::Thumb2Assembler
[all...] |
| assembler_thumb2.h | 106 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
|
| /external/chromium_org/v8/src/arm/ |
| disasm-arm.cc | 434 // Print the movw or movt instruction.
518 // 'mw: movt/movw instructions.
893 Format(instr, "movw'cond 'mw");
[all...] |
| assembler-arm.cc | 113 // Use movw/movt for QUALCOMM ARMv7 cores.
227 // specially coded on ARM means that it is a movw/movt instruction, or is an
812 // movw dst, #target16_0
836 // Patch with movw/movt.
841 patcher.masm()->movw(dst, target16_0);
846 patcher.masm()->movw(dst, target16_0);
1011 *rotate_imm = *immed_8 = 0; // Not used for movw.
1063 // Prefer movw / movt to constant pool if it is more efficient on the CPU.
1069 // Otherwise, use immediate load if movw / movt is available.
1515 void Assembler::movw(Register reg, uint32_t immediate, Condition cond) { function in class:v8::internal::Assembler
[all...] |
| /external/chromium_org/v8/src/compiler/x64/ |
| code-generator-x64.cc | 520 __ movw(operand, Immediate(i.InputInt16(index)));
522 __ movw(operand, i.InputRegister(index));
|
| /external/chromium_org/third_party/boringssl/src/crypto/chacha/ |
| chacha_vec_arm.S | 68 movw ip, #43691
634 movw r3, #43691
|
| /external/libhevc/common/arm/ |
| ihevc_itrans_recon_16x16.s | 148 movw r7,#0xffff
156 movw r7,#0xfff0
|
| /external/llvm/test/MC/X86/ |
| x86-32-coverage.s | 6 // CHECK: movw $31438, 3735928559(%ebx,%ecx,8)
7 movw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm.cc | 268 // mov -> movw.
275 // Movw can't do setcc, so first move to ip, then the following instruction
284 // The eor does the setcc so we get a movw here.
290 COMPARE(movw(r5, 0xabcd, eq),
[all...] |
| test-disasm-x64.cc | 141 __ movw(Operand(rsp, 16), rdx);
|
| /external/valgrind/main/none/tests/x86/ |
| insn_basic.def | 476 movw imm16[12345] r16.uw[0] => 1.uw[12345]
477 movw imm16[12345] m16.uw[0] => 1.uw[12345]
478 movw r16.uw[12345] r16.uw[0] => 1.uw[12345]
479 movw r16.uw[12345] m16.uw[0] => 1.uw[12345]
480 movw m16.uw[12345] r16.uw[0] => 1.uw[12345]
[all...] |
