/external/llvm/test/MC/ARM/ |
eh-directive-integrated-test.s | 19 @ restore the general-purpose and VFP registers.
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/external/chromium_org/third_party/boringssl/linux-arm/crypto/bn/ |
armv4-mont.S | 40 stmdb sp!,{r4-r12,lr} @ save 10 registers 164 ldmia sp!,{r4-r12,lr} @ restore registers
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/external/chromium_org/v8/test/mjsunit/regress/ |
regress-compare-constant-doubles.js | 36 // Fill XMM registers with cruft.
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/external/chromium_org/v8/test/mjsunit/ |
typed-array-slice.js | 30 // This is a regression test for overlapping key and value registers.
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/external/chromium_org/v8/test/webkit/ |
codegen-peephole-locals.js | 25 "Tests whether peephole optimizations on bytecode properly deal with local registers."
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/external/libhevc/common/arm/ |
ihevc_intra_pred_chroma_dc.s | 84 @**************variables vs registers***************************************** 288 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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ihevc_intra_pred_chroma_mode2.s | 84 @**************variables vs registers***************************************** 293 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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ihevc_intra_pred_luma_dc.s | 84 @**************variables vs registers***************************************** 501 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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ihevc_itrans_recon_4x4.s | 93 @**************variables vs registers************************* 227 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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ihevc_itrans_recon_4x4_ttype1.s | 96 @**************variables vs registers************************* 227 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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ihevc_weighted_pred_uni.s | 103 @**************variables vs registers***************************************** 217 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
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/external/openssl/crypto/bn/asm/ |
armv4-mont.S | 39 stmdb sp!,{r4-r12,lr} @ save 10 registers 163 ldmia sp!,{r4-r12,lr} @ restore registers
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pa-risc2.s | 37 ; For the floating point registers 39 ; "caller save" registers: fr4-fr11, fr22-fr31 40 ; "callee save" registers: fr12-fr21 41 ; "special" registers: fr0-fr3 (status and exception registers) 43 ; For the integer registers 45 ; "caller save" registers: r1,r19-r26 46 ; "callee save" registers: r3-r18 918 ; Registers to hold 64-bit values to manipulate. The "L" part 923 ; using them because they are callee save registers [all...] |
pa-risc2W.s | 31 ; For the floating point registers 33 ; "caller save" registers: fr4-fr11, fr22-fr31 34 ; "callee save" registers: fr12-fr21 35 ; "special" registers: fr0-fr3 (status and exception registers) 37 ; For the integer registers 39 ; "caller save" registers: r1,r19-r26 40 ; "callee save" registers: r3-r18 905 ; Registers to hold 64-bit values to manipulate. The "L" part 910 ; using them because they are callee save registers [all...] |
/external/qemu/distrib/sdl-1.2.15/src/video/ataricommon/ |
SDL_ikbdinterrupt.S | 56 | Save MFP registers used for keyboard 128 | Restore previous MFP registers
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/ndk/toolchains/mips64el-linux-android-4.9/ |
setup.mk | 36 -frename-registers \
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/ndk/toolchains/mipsel-linux-android-4.6/ |
setup.mk | 36 -frename-registers \
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/ndk/toolchains/mipsel-linux-android-4.8/ |
setup.mk | 36 -frename-registers \
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/ndk/toolchains/mipsel-linux-android-4.9/ |
setup.mk | 36 -frename-registers \
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/external/llvm/test/MC/SystemZ/ |
regs-bad.s | 242 # Test invalid CFI registers. Will need to be updated once access 243 # registers are modelled as LLVM registers.
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/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/ |
loopfilter_filters_altivec.asm | 33 ;# group of vector registers and think of it as occupying a block of 75 ;# are in registers Vhihi and Vlolo, we can also effect the permutation 94 ;# Except for the fact that the destination registers get written 104 ;# using all 32 registers, alternating the banks 0..15 and 16 .. 31, 105 ;# leaving the final result in 16 .. 31, as the lower registers are 147 ;# we need to convert 16 rows of 4 pels each into 4 registers of 16 pels 163 ;# into a temporary array, reading the rows of the array into vector registers, 178 ;# It acts in place on registers v0...v3, uses v4...v7 as temporaries, 180 ;# defined above. We think of both groups of 4 registers as having 244 ;# The input/output is in registers v0...v7. We use v10...v17 as mirrors [all...] |
/external/libvpx/libvpx/vp8/common/ppc/ |
loopfilter_filters_altivec.asm | 33 ;# group of vector registers and think of it as occupying a block of 75 ;# are in registers Vhihi and Vlolo, we can also effect the permutation 94 ;# Except for the fact that the destination registers get written 104 ;# using all 32 registers, alternating the banks 0..15 and 16 .. 31, 105 ;# leaving the final result in 16 .. 31, as the lower registers are 147 ;# we need to convert 16 rows of 4 pels each into 4 registers of 16 pels 163 ;# into a temporary array, reading the rows of the array into vector registers, 178 ;# It acts in place on registers v0...v3, uses v4...v7 as temporaries, 180 ;# defined above. We think of both groups of 4 registers as having 244 ;# The input/output is in registers v0...v7. We use v10...v17 as mirrors [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
loopfilter_filters_altivec.asm | 33 ;# group of vector registers and think of it as occupying a block of 75 ;# are in registers Vhihi and Vlolo, we can also effect the permutation 94 ;# Except for the fact that the destination registers get written 104 ;# using all 32 registers, alternating the banks 0..15 and 16 .. 31, 105 ;# leaving the final result in 16 .. 31, as the lower registers are 147 ;# we need to convert 16 rows of 4 pels each into 4 registers of 16 pels 163 ;# into a temporary array, reading the rows of the array into vector registers, 178 ;# It acts in place on registers v0...v3, uses v4...v7 as temporaries, 180 ;# defined above. We think of both groups of 4 registers as having 244 ;# The input/output is in registers v0...v7. We use v10...v17 as mirrors [all...] |
/external/chromium_org/third_party/x86inc/ |
x86inc.asm | 118 ; into registers at the start, and make no other use of the stack. Luckily that 123 ; %2 = number of registers used. pushes callee-saved regs if needed. 124 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed. 125 ; %4 = list of names to define to registers 143 ; registers: 405 ; Change the order of registers so we can get the lower 8-bit or the 5th and 6th 640 ; registers, except that this way you exchange the register names instead, so it
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/external/lldb/tools/debugserver/source/ |
DNB.cpp | [all...] |