| /art/compiler/utils/x86_64/ |
| assembler_x86_64_test.cc | 177 std::vector<x86_64::CpuRegister*> registers; local
178 registers.push_back(new x86_64::CpuRegister(x86_64::RAX));
179 registers.push_back(new x86_64::CpuRegister(x86_64::RBX));
180 registers.push_back(new x86_64::CpuRegister(x86_64::RCX));
181 registers.push_back(new x86_64::CpuRegister(x86_64::RDX));
182 registers.push_back(new x86_64::CpuRegister(x86_64::RBP));
183 registers.push_back(new x86_64::CpuRegister(x86_64::RSP));
184 registers.push_back(new x86_64::CpuRegister(x86_64::RSI));
185 registers.push_back(new x86_64::CpuRegister(x86_64::RDI));
186 registers.push_back(new x86_64::CpuRegister(x86_64::R8))
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/ |
| CodeAddress.java | 58 public final DalvInsn withRegisters(RegisterSpecList registers) {
|
| /external/lldb/include/lldb/ |
| lldb-private-types.h | 33 uint32_t *value_regs; // List of registers that must be terminated with LLDB_INVALID_REGNUM
34 uint32_t *invalidate_regs; // List of registers that must be invalidated when this register is modified, list must be terminated with LLDB_INVALID_REGNUM
38 // Registers are grouped into register sets
44 size_t num_registers; // The number of registers in REGISTERS array below
45 const uint32_t *registers; // An array of register numbers in this set member in struct:lldb_private::__anon8964
|
| /external/lldb/test/macosx/universal/ |
| TestUniversal.py | 70 registers = print_registers(frame, string_buffer=True)
71 self.expect(registers, exe=False,
98 registers = print_registers(frame, string_buffer=True)
99 self.expect(registers, exe=False,
|
| /external/llvm/test/MC/Mips/ |
| nooddspreg-error.s | 9 # CHECK-ERROR: :[[@LINE-1]]:15: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK-ERROR: :[[@LINE-2]]:25: error: -mno-odd-spreg prohibits the use of odd FPU registers
|
| nabi-regs.s | 2 # set for the A and T registers because the NABI allows
3 # for 4 more register parameters (A registers) offsetting
4 # the T registers.
|
| /external/chromium_org/v8/src/ |
| interpreter-irregexp.cc | 162 int* registers,
202 *backtrack_sp++ = registers[insn >> BYTECODE_SHIFT];
206 registers[insn >> BYTECODE_SHIFT] = Load32Aligned(pc + 4);
210 registers[insn >> BYTECODE_SHIFT] += Load32Aligned(pc + 4);
214 registers[insn >> BYTECODE_SHIFT] = current + Load32Aligned(pc + 4);
218 current = registers[insn >> BYTECODE_SHIFT];
222 registers[insn >> BYTECODE_SHIFT] =
227 backtrack_sp = backtrack_stack_base + registers[insn >> BYTECODE_SHIFT];
246 registers[insn >> BYTECODE_SHIFT] = *backtrack_sp;
471 if (registers[insn >> BYTECODE_SHIFT] < Load32Aligned(pc + 4))
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| __bionic_clone.S | 34 # save registers to parent stack
55 # In the parent, reload saved registers then either return or set errno.
|
| /bionic/libc/arch-x86/bionic/ |
| syscall.S | 16 # Push the callee save registers.
44 # Restore the callee save registers.
|
| /build/core/clang/ |
| arm64.mk | 16 -frename-registers \
|
| mips.mk | 13 -frename-registers \
|
| mips64.mk | 13 -frename-registers \
|
| /external/llvm/lib/Target/X86/ |
| X86CompilationCallback_Win64.asm | 23 ; Save all int arg registers
33 ; Save all XMM arg registers. Also allocate reg spill area.
47 ; Restore all XMM arg registers.
56 ; Restore all int arg registers
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdCountLeadingZeros.s | 24 ; Input / output registers
27 ; -- NEON registers --
|
| /external/jpeg/ |
| jmemdosa.asm | 17 ; we save and restore all 8086 registers, even though most compilers only
46 push si ; save all registers for safety
61 open_err: pop ds ; restore registers and exit
81 push si ; save all registers for safety
93 close_err: pop ds ; restore registers and exit
113 push si ; save all registers for safety
127 seek_err: pop ds ; restore registers and exit
147 push si ; save all registers for safety
165 read_err: pop ds ; restore registers and exit
185 push si ; save all registers for safet
[all...] |
| /external/qemu/distrib/jpeg-6b/ |
| jmemdosa.asm | 17 ; we save and restore all 8086 registers, even though most compilers only
46 push si ; save all registers for safety
61 open_err: pop ds ; restore registers and exit
81 push si ; save all registers for safety
93 close_err: pop ds ; restore registers and exit
113 push si ; save all registers for safety
127 seek_err: pop ds ; restore registers and exit
147 push si ; save all registers for safety
165 read_err: pop ds ; restore registers and exit
185 push si ; save all registers for safet
[all...] |
| /external/chromium_org/third_party/angle/src/libGLESv2/renderer/d3d/ |
| DynamicHLSL.h | 67 bool generateShaderLinkHLSL(gl::InfoLog &infoLog, int registers, const VaryingPacking packing,
76 std::string generateGeometryShaderHLSL(int registers, rx::ShaderD3D *fragmentShader, rx::ShaderD3D *vertexShader) const;
94 std::string generatePointSpriteHLSL(int registers, rx::ShaderD3D *fragmentShader, rx::ShaderD3D *vertexShader) const;
|
| /external/libunwind/doc/ |
| unw_get_fpreg.tex | 25 Furthermore, the exact set of accessible registers may depend on the
28 (``callee-saved'') registers and frame-related registers (such as the
31 all registers.
34 floating-point registers. See \Func{unw\_get\_fpreg}(3) for a way to
35 read registers which fit in a single word.
|
| unw_get_reg.tex | 25 Furthermore, the exact set of accessible registers may depend on the
28 (``callee-saved'') registers and frame-related registers (such as the
31 all registers.
34 registers whose values fit in a single word. See
35 \Func{unw\_get\_fpreg}(3) for a way to read registers which do not fit
|
| unw_set_fpreg.tex | 25 Furthermore, the exact set of accessible registers may depend on the
28 (``callee-saved'') registers and frame-related registers (such as the
31 all registers.
34 floating-point registers. See \Func{unw\_set\_reg}(3) for a way to
35 write registers which fit in a single word.
|
| unw_set_reg.tex | 25 Furthermore, the exact set of accessible registers may depend on the
28 (``callee-saved'') registers and frame-related registers (such as the
31 all registers.
34 registers whose values fit in a single word. See
35 \Func{unw\_set\_fpreg}(3) for a way to write registers which do not
|
| /external/llvm/lib/Support/ |
| Host.cpp | 88 int registers[4];
89 __cpuid(registers, value);
90 *rEAX = registers[0];
91 *rEBX = registers[1];
92 *rECX = registers[2];
93 *rEDX = registers[3];
122 int registers[4];
123 __cpuidex(registers, value, subleaf);
124 *rEAX = registers[0];
125 *rEBX = registers[1]
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.cpp | 75 int registers[4];
76 __cpuid(registers, value);
77 *rEAX = registers[0];
78 *rEBX = registers[1];
79 *rECX = registers[2];
80 *rEDX = registers[3];
139 int registers[4];
140 __cpuidex(registers, value, subleaf);
141 *rEAX = registers[0];
142 *rEBX = registers[1]
[all...] |
| /bionic/libc/arch-x86_64/bionic/ |
| syscall.S | 44 # All arguments are passed via registers.
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| LocalEnd.java | 65 public DalvInsn withRegisters(RegisterSpecList registers) {
|
