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  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/win64/tests/
sce4.asm 5 [savereg rsi, 8*64*1024-8] ; last smaller-sized
13 [savereg rsi, 8*64*1024] ; first larger-sized
sce3.asm 12 mov [rbp+018h], rsi
13 [savereg rsi, 018h]
36 mov rsi, [rbp+018h]
48 .SavedRsi resq 1 ; saved register RSI
54 .SavedRsi resq 1 ; Saved Register RSI
60 save_reg rsi, sampleFrame.SavedRsi
65 mov rsi, [rsp+sampleFrame.SavedRsi]
  /external/llvm/test/Instrumentation/AddressSanitizer/X86/
asm_mov.s 13 # CHECK-NEXT: movb (%rsi), %al
24 movb (%rsi), %al
42 # CHECK-NEXT: movaps (%rsi), %xmm0
53 movaps (%rsi), %xmm0
  /external/llvm/test/MC/X86/
x86_errors.s 30 movq (%rsi,%ecx),%xmm0
  /external/openssl/crypto/
x86_64cpuid.S 16 .Lspin: leaq (%rsi,%rax,1),%r8
161 cmpq $15,%rsi
163 cmpq $0,%rsi
167 subq $1,%rsi
177 leaq -1(%rsi),%rsi
182 leaq -8(%rsi),%rsi
183 testq $-8,%rsi
186 cmpq $0,%rsi
    [all...]
  /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/x86/
postproc_sse2.asm 103 push rsi
115 mov rsi, arg(0) ;src_ptr
124 movdqu xmm0, XMMWORD PTR [rsi]
125 movdqu xmm1, XMMWORD PTR [rsi + rax]
126 movdqu xmm3, XMMWORD PTR [rsi + 2*rax]
132 movdqu xmm1, XMMWORD PTR [rsi + 2*rax]
133 movdqu xmm3, XMMWORD PTR [rsi + rax]
140 add rsi, 16
151 sub rsi, rdx
210 add rsi,rax ;next src lin
    [all...]
loopfilter_sse2.asm 31 movdqa xmm1, [rsi+2*rax] ; q2
32 movdqa xmm4, [rsi+rax] ; q1
33 movdqa xmm5, [rsi] ; q0
36 movlps xmm2, [rsi + rcx*2] ; q3
37 movlps xmm1, [rsi + rcx] ; q2
38 movlps xmm4, [rsi] ; q1
39 movlps xmm5, [rsi + rax] ; q0
46 lea rsi, [rsi + rax*4]
78 movdqa xmm2, [rsi+4*rax] ; p
    [all...]
subpixel_mmx.asm 37 push rsi
49 mov rsi, arg(0) ;src_ptr
55 movq mm3, [rsi-2] ; mm3 = p-2..p5
79 movd mm4, [rsi+3]
96 add rsi, dword ptr arg(2) ;src_pixels_per_line ; next line
102 add rsi, r8 ; next line
110 pop rsi
134 push rsi
148 mov rsi, arg(0) ;src_ptr
149 sub rsi, rd
    [all...]
  /external/libvpx/libvpx/vp8/common/x86/
postproc_sse2.asm 103 push rsi
115 mov rsi, arg(0) ;src_ptr
124 movdqu xmm0, XMMWORD PTR [rsi]
125 movdqu xmm1, XMMWORD PTR [rsi + rax]
126 movdqu xmm3, XMMWORD PTR [rsi + 2*rax]
132 movdqu xmm1, XMMWORD PTR [rsi + 2*rax]
133 movdqu xmm3, XMMWORD PTR [rsi + rax]
140 add rsi, 16
151 sub rsi, rdx
210 add rsi,rax ;next src lin
    [all...]
loopfilter_sse2.asm 31 movdqa xmm1, [rsi+2*rax] ; q2
32 movdqa xmm4, [rsi+rax] ; q1
33 movdqa xmm5, [rsi] ; q0
36 movlps xmm2, [rsi + rcx*2] ; q3
37 movlps xmm1, [rsi + rcx] ; q2
38 movlps xmm4, [rsi] ; q1
39 movlps xmm5, [rsi + rax] ; q0
46 lea rsi, [rsi + rax*4]
78 movdqa xmm2, [rsi+4*rax] ; p
    [all...]
subpixel_mmx.asm 37 push rsi
49 mov rsi, arg(0) ;src_ptr
55 movq mm3, [rsi-2] ; mm3 = p-2..p5
79 movd mm4, [rsi+3]
96 add rsi, dword ptr arg(2) ;src_pixels_per_line ; next line
102 add rsi, r8 ; next line
110 pop rsi
134 push rsi
148 mov rsi, arg(0) ;src_ptr
149 sub rsi, rd
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/
postproc_sse2.asm 103 push rsi
115 mov rsi, arg(0) ;src_ptr
124 movdqu xmm0, XMMWORD PTR [rsi]
125 movdqu xmm1, XMMWORD PTR [rsi + rax]
126 movdqu xmm3, XMMWORD PTR [rsi + 2*rax]
132 movdqu xmm1, XMMWORD PTR [rsi + 2*rax]
133 movdqu xmm3, XMMWORD PTR [rsi + rax]
140 add rsi, 16
151 sub rsi, rdx
210 add rsi,rax ;next src lin
    [all...]
loopfilter_sse2.asm 31 movdqa xmm1, [rsi+2*rax] ; q2
32 movdqa xmm4, [rsi+rax] ; q1
33 movdqa xmm5, [rsi] ; q0
36 movlps xmm2, [rsi + rcx*2] ; q3
37 movlps xmm1, [rsi + rcx] ; q2
38 movlps xmm4, [rsi] ; q1
39 movlps xmm5, [rsi + rax] ; q0
46 lea rsi, [rsi + rax*4]
78 movdqa xmm2, [rsi+4*rax] ; p
    [all...]
subpixel_mmx.asm 37 push rsi
49 mov rsi, arg(0) ;src_ptr
55 movq mm3, [rsi-2] ; mm3 = p-2..p5
79 movd mm4, [rsi+3]
96 add rsi, dword ptr arg(2) ;src_pixels_per_line ; next line
102 add rsi, r8 ; next line
110 pop rsi
134 push rsi
148 mov rsi, arg(0) ;src_ptr
149 sub rsi, rd
    [all...]
  /external/chromium_org/third_party/boringssl/win-x86_64/crypto/bn/
x86_64-mont.asm 11 mov QWORD PTR[16+rsp],rsi
15 mov rsi,rdx
26 cmp rdx,rsi
53 mov rax,QWORD PTR[rsi]
68 mov rax,QWORD PTR[8+rsi]
78 mov rax,QWORD PTR[r15*8+rsi]
99 mov rax,QWORD PTR[rsi]
131 mov rax,QWORD PTR[8+rsi]
142 mov rax,QWORD PTR[r15*8+rsi]
165 mov rax,QWORD PTR[rsi]
    [all...]
x86_64-mont5.asm 11 mov QWORD PTR[16+rsp],rsi
15 mov rsi,rdx
76 mov rax,QWORD PTR[rsi]
106 mov rax,QWORD PTR[8+rsi]
116 mov rax,QWORD PTR[r15*8+rsi]
139 mov rax,QWORD PTR[rsi]
186 mov rax,QWORD PTR[8+rsi]
197 mov rax,QWORD PTR[r15*8+rsi]
222 mov rax,QWORD PTR[rsi]
244 lea rsi,QWORD PTR[rsp
    [all...]
  /external/zlib/src/contrib/gcc_gvmat64/
gvmat64.S 68 ; register used : rax,rbx,rcx,rdx,rsi,rdi,r8,r9,r10,r11,r12
181 ; param 1 in rdi, param 2 in rsi
194 ; mac: param 1 in rdi, param 2 rsi
283 lea rsi,[r10+r11]
298 cmp bx,word ptr [rsi + r8 - 1]
318 cmp bx,word ptr [rsi + r8 - 1]
337 cmp bx,word ptr [rsi + r8 - 1]
357 cmp bx,word ptr [rsi + r8 - 1]
399 cmp bx,word ptr [rsi + r8 - 1]
418 lea rsi,[r8+r10]
    [all...]
  /external/chromium_org/third_party/boringssl/linux-x86_64/crypto/bn/
x86_64-mont5.S 62 movq (%rsi),%rax
92 movq 8(%rsi),%rax
102 movq (%rsi,%r15,8),%rax
125 movq (%rsi),%rax
172 movq 8(%rsi),%rax
183 movq (%rsi,%r15,8),%rax
208 movq (%rsi),%rax
230 leaq (%rsp),%rsi
236 movq 8(%rsi,%r14,8),%rax
246 movq (%rsp,%r14,8),%rsi
    [all...]
  /external/chromium_org/third_party/boringssl/mac-x86_64/crypto/bn/
x86_64-mont5.S 62 movq (%rsi),%rax
92 movq 8(%rsi),%rax
102 movq (%rsi,%r15,8),%rax
125 movq (%rsi),%rax
172 movq 8(%rsi),%rax
183 movq (%rsi,%r15,8),%rax
208 movq (%rsi),%rax
230 leaq (%rsp),%rsi
236 movq 8(%rsi,%r14,8),%rax
246 movq (%rsp,%r14,8),%rsi
    [all...]
  /bionic/libc/arch-x86_64/string/
ssse3-strcmp-slm.S 92 and $0x3f, %rcx /* rsi alignment in cache line */
95 ja L(crosscache) /* rsi: 16-byte load will cross cache line */
99 movlpd (%rsi), %xmm2
101 movhpd 8(%rsi), %xmm2
113 add $16, %rsi /* prepare to search next 16 bytes */
123 and $0xfffffffffffffff0, %rsi /* force %rsi is 16 byte aligned */
127 and $0xf, %ecx /* offset of rsi */
130 je L(ashr_0) /* rsi and rdi relative offset same */
134 xchg %rsi, %rd
    [all...]
  /external/chromium_org/third_party/boringssl/win-x86_64/crypto/modes/
ghash-x86_64.asm 10 mov QWORD PTR[16+rsp],rsi
14 mov rsi,rdx
30 mov r8,QWORD PTR[8+rax*1+rsi]
31 mov r9,QWORD PTR[rax*1+rsi]
43 xor r8,QWORD PTR[8+rbx*1+rsi]
45 xor r9,QWORD PTR[rbx*1+rsi]
58 xor r8,QWORD PTR[8+rax*1+rsi]
60 xor r9,QWORD PTR[rax*1+rsi]
73 xor r8,QWORD PTR[8+rax*1+rsi]
75 xor r9,QWORD PTR[rax*1+rsi]
    [all...]
  /art/runtime/arch/x86_64/
quick_entrypoints_x86_64.S 160 PUSH rsi // Quick arg 1.
216 POP rsi
234 movq %rsp, %rsi
243 movq %rsp, %rsi // pass SP
255 movq %gs:THREAD_SELF_OFFSET, %rsi // pass Thread::Current()
309 * NOTE: "this" is first visible argument of the target, and so can be found in arg1/rsi.
426 * rsi = argument array that must at least contain the this pointer.
439 leaq 4(%rsi), %r11 // R11 := arg_array + 4 ; ie skip this pointer.
470 movq %rsi, %r11 // R11 := arg_array
474 rep movsb // while (rcx--) { *rdi++ = *rsi++
    [all...]
  /external/chromium_org/third_party/libjpeg_turbo/simd/
jiss2flt-64.asm 93 mov rsi, r11 ; inptr
98 mov eax, DWORD [DWBLOCK(1,0,rsi,SIZEOF_JCOEF)]
99 or eax, DWORD [DWBLOCK(2,0,rsi,SIZEOF_JCOEF)]
102 movq xmm1, XMM_MMWORD [MMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
103 movq xmm2, XMM_MMWORD [MMBLOCK(2,0,rsi,SIZEOF_JCOEF)]
104 movq xmm3, XMM_MMWORD [MMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
105 movq xmm4, XMM_MMWORD [MMBLOCK(4,0,rsi,SIZEOF_JCOEF)]
106 movq xmm5, XMM_MMWORD [MMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
107 movq xmm6, XMM_MMWORD [MMBLOCK(6,0,rsi,SIZEOF_JCOEF)]
108 movq xmm7, XMM_MMWORD [MMBLOCK(7,0,rsi,SIZEOF_JCOEF)
    [all...]
  /external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/x86/
quantize_mmx.asm 23 push rsi
28 mov rsi, arg(0) ;coeff_ptr
29 movq mm0, [rsi]
72 movq mm4, [rsi+8]
113 movq mm4, [rsi+16]
154 movq mm4, [rsi+24]
196 mov rsi, arg(2) ;qcoeff_ptr
201 movq mm0, [rsi]
202 movq mm1, [rsi+8]
224 movq mm0, [rsi+16
    [all...]
temporal_filter_apply_sse2.asm 31 push rsi
58 mov rsi, arg(0) ; src/frame1
78 movq xmm0, [rsi] ; first row
79 lea rsi, [rsi + rbp] ; += stride
81 movq xmm1, [rsi] ; second row
82 lea rsi, [rsi + rbp] ; += stride
87 movdqa xmm0, [rsi] ; src (frame1)
88 lea rsi, [rsi + rbp] ; += strid
    [all...]

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