/external/llvm/lib/AsmParser/ |
LLLexer.cpp | 702 INSTKEYWORD(udiv, UDiv); INSTKEYWORD(sdiv, SDiv); INSTKEYWORD(fdiv, FDiv);
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/art/compiler/utils/ |
assembler_thumb_test.cc | 981 __ udiv(R0, R1, R2); 982 __ udiv(R8, R9, R10); [all...] |
/external/llvm/test/Bindings/Ocaml/ |
vmcore.ml | 235 * CHECK: @const_udiv = global i64 udiv [all...] |
/external/qemu/target-arm/ |
helper.h | 14 DEF_HELPER_2(udiv, i32, i32, i32)
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/external/llvm/lib/ExecutionEngine/Interpreter/ |
Execution.cpp | 698 // Additional macros to execute binary operations udiv/sdiv/urem/srem since 735 case Instruction::UDiv: INTEGER_VECTOR_FUNCTION(udiv) break; 777 case Instruction::UDiv: R.IntVal = Src1.IntVal.udiv(Src2.IntVal); break; [all...] |
/external/chromium_org/v8/src/arm/ |
assembler-arm.h | 968 void udiv(Register dst, Register src1, Register src2, Condition cond = al); [all...] |
assembler-arm.cc | 1565 void Assembler::udiv(Register dst, Register src1, Register src2, function in class:v8::internal::Assembler [all...] |
/external/chromium_org/v8/src/arm64/ |
assembler-arm64.h | [all...] |
macro-assembler-arm64-inl.h | 1180 void MacroAssembler::Udiv(const Register& rd, 1185 udiv(rd, rn, rm); [all...] |
assembler-arm64.cc | 1530 void Assembler::udiv(const Register& rd, function in class:v8::internal::Assembler [all...] |
/external/llvm/lib/Analysis/ |
ConstantFolding.cpp | 836 APInt NewIdx = Offset.udiv(ElemSize); [all...] |
ScalarEvolution.cpp | 212 const SCEVUDivExpr *UDiv = cast<SCEVUDivExpr>(this); 213 OS << "(" << *UDiv->getLHS() << " /u " << *UDiv->getRHS() << ")"; 603 // Lexicographically compare udiv expressions. [all...] |
InstructionSimplify.cpp | [all...] |
/external/llvm/lib/ExecutionEngine/ |
ExecutionEngine.cpp | 765 case Instruction::UDiv: 783 case Instruction::UDiv:GV.IntVal = LHS.IntVal.udiv(RHS.IntVal); break; [all...] |
/external/vixl/src/a64/ |
assembler-a64.h | 1093 void udiv(const Register& rd, const Register& rn, const Register& rm); [all...] |
macro-assembler-a64.h | [all...] |
assembler-a64.cc | 978 void Assembler::udiv(const Register& rd, function in class:vixl::Assembler 983 Emit(SF(rd) | UDIV | Rm(rm) | Rn(rn) | Rd(rd)); [all...] |
/external/chromium_org/v8/test/cctest/ |
test-disasm-arm64.cc | 472 COMPARE(udiv(w6, w7, w8), "udiv w6, w7, w8"); 473 COMPARE(udiv(x9, x10, x11), "udiv x9, x10, x11"); [all...] |
/external/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | [all...] |
basic-a64-instructions.s | [all...] |
/external/vixl/test/ |
test-disasm-a64.cc | 424 COMPARE(udiv(w6, w7, w8), "udiv w6, w7, w8"); 425 COMPARE(udiv(x9, x10, x11), "udiv x9, x10, x11"); [all...] |
/art/compiler/utils/arm/ |
assembler_arm32.cc | 195 void Arm32Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) { function in class:art::arm::Arm32Assembler [all...] |
assembler_thumb2.cc | 240 void Thumb2Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) { function in class:art::arm::Thumb2Assembler [all...] |
/external/llvm/lib/IR/ |
ConstantFold.cpp | [all...] |
/external/openssl/crypto/bn/asm/ |
sparcv8.S | 340 udiv %o1,%o2,%o0
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