/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
vp8_subpixelvariance16x16_neon.asm | 47 vld1.s32 {d31}, [r2] ;load first_pass filter 52 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data 54 vld1.u8 {d5, d6, d7}, [r0], r1 57 vld1.u8 {d8, d9, d10}, [r0], r1 60 vld1.u8 {d11, d12, d13}, [r0], r1 109 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data 111 vld1.u8 {d5, d6, d7}, [r0], r1 114 vld1.u8 {d8, d9, d10}, [r0], r1 116 vld1.u8 {d11, d12, d13}, [r0], r1 121 vld1.u8 {d14, d15, d16}, [r0], r [all...] |
sixtappredict8x8_neon.asm | 51 vld1.s32 {q14, q15}, [r2] ;load first_pass filter 70 vld1.u8 {q3}, [r0], r1 ;load src data 72 vld1.u8 {q4}, [r0], r1 74 vld1.u8 {q5}, [r0], r1 76 vld1.u8 {q6}, [r0], r1 145 vld1.u8 {q3}, [r0], r1 ;load src data 153 vld1.u8 {q4}, [r0], r1 155 vld1.u8 {q5}, [r0], r1 157 vld1.u8 {q6}, [r0], r1 163 ;vld1.u8 {q3}, [r0], r1 ;load src dat [all...] |
sixtappredict4x4_neon.asm | 49 vld1.s32 {q14, q15}, [r2] ;load first_pass filter 60 vld1.u8 {q3}, [r0], r1 ;load first 4-line src data 62 vld1.u8 {q4}, [r0], r1 64 vld1.u8 {q5}, [r0], r1 66 vld1.u8 {q6}, [r0], r1 124 vld1.u8 {q3}, [r0], r1 ;load rest 5-line src data 125 vld1.u8 {q4}, [r0], r1 130 vld1.u8 {q5}, [r0], r1 131 vld1.u8 {q6}, [r0], r1 137 vld1.u8 {q11}, [r0], r [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_neon_Convolve.S | 36 vld1.16 {q0, q1}, [r4] 46 vld1.8 {q13}, [r1], r5 47 vld1.8 {q14}, [r2], r5 48 vld1.8 {q15}, [r3], r5 132 vld1.16 {d0, d1, d2, d3}, [r6]! 133 vld1.16 {d4, d5, d6}, [r6] 145 vld1.8 {d24, d25, d26}, [r1], r7 @ y0 ( y - 2 ) 146 vld1.8 {d27, d28, d29}, [r2], r7 @ y0 ( y - 1 ) 191 vld1.8 {d24, d25, d26}, [r3], r7 @ y0 ( y ) 192 vld1.8 {d27, d28, d29}, [r4], r7 @ y0 ( y + 1 [all...] |
rsCpuIntrinsics_neon_ColorMatrix.S | 30 vld1.16 {q2}, [r2]! 31 vld1.16 {q3}, [r2]! 32 vld1.32 {d8[],d9[]}, [r2]! 33 vld1.32 {d10[],d11[]}, [r2]! 34 vld1.32 {d12[],d13[]}, [r2]! 35 vld1.32 {d14[],d15[]}, [r2]! 47 vld1.32 {q4}, [r2]! 48 vld1.32 {q5}, [r2]! 49 vld1.32 {q6}, [r2]! 50 vld1.32 {q7}, [r2] [all...] |
/external/libhevc/common/arm/ |
ihevc_inter_pred_chroma_copy_w16out.s | 132 vld1.8 {d0},[r0] @vld1_u8(pu1_src_tmp) 138 vld1.8 {d22},[r5],r2 @vld1_u8(pu1_src_tmp) 143 vld1.8 {d24},[r5],r2 @vld1_u8(pu1_src_tmp) 148 vld1.8 {d26},[r5],r2 @vld1_u8(pu1_src_tmp) 173 vld1.8 {d0},[r0] @vld1_u8(pu1_src_tmp) 179 vld1.8 {d22},[r5],r2 @vld1_u8(pu1_src_tmp) 184 vld1.8 {d24},[r5],r2 @vld1_u8(pu1_src_tmp) 208 vld1.8 {d8},[r0]! @vld1_u8(pu1_src_tmp) 209 vld1.8 {d10},[r6],r2 @vld1_u8(pu1_src_tmp) 210 vld1.8 {d12},[r6],r2 @vld1_u8(pu1_src_tmp [all...] |
ihevc_itrans_recon_16x16.s | 147 vld1.16 {d0,d1,d2,d3},[r14] @//d0,d1 are used for storing the constant data 222 vld1.16 d10,[r0],r6 223 vld1.16 d11,[r9],r6 224 vld1.16 d6,[r0],r10 225 vld1.16 d7,[r9],r10 229 vld1.16 d4,[r0],r6 230 vld1.16 d5,[r9],r6 231 vld1.16 d8,[r0],r8 232 vld1.16 d9,[r9],r8 305 vld1.16 d10,[r0],r [all...] |
ihevc_itrans_recon_4x4.s | 140 vld1.16 d4,[r8] @loading first row of g_ai2_ihevc_trans_4_transpose 145 vld1.16 d1,[r9] @loading pi2_src 2nd row 146 vld1.16 d3,[r10] @loading pi2_src 4th row 147 vld1.16 d0,[r0],r4 @loading pi2_src 1st row 148 vld1.16 d2,[r0],r4 @loading pi2_src 3rd row 155 vld1.32 d22[0], [r2],r5 182 vld1.32 d22[1], [r2],r5 186 vld1.32 d23[0], [r2],r5 203 vld1.32 d23[1], [r2],r5
|
ihevc_deblk_chroma_horz.s | 60 vld1.8 {d0},[r0] 66 vld1.8 {d2},[r12] 69 vld1.8 {d4},[r5] 71 vld1.8 {d16},[r6]
|
ihevc_deblk_chroma_vert.s | 63 vld1.8 {d5},[r8],r1 65 vld1.8 {d17},[r8],r1 67 vld1.8 {d16},[r8],r1 69 vld1.8 {d4},[r8]
|
ihevc_intra_pred_luma_dc.s | 149 vld1.s8 d0, [r6]! @load from src[nt] 151 vld1.s8 d1, [r8]! @load from src[2nt+1] 158 vld1.s8 d0, [r6]! @load from src[nt] (extra load for 8) 160 vld1.s8 d1, [r8]! @load from src[2nt+1] (extra load for 8) 180 vld1.s8 d0, [r6]! @load from src[nt] (extra load for 16) 183 vld1.s8 d1, [r8]! @load from src[2nt+1] (extra load for 16) 223 vld1.s8 d0, [r8]! @col 1::7 load (prol) 226 vld1.s8 d1, [r9] @row 7::1 (0 also) load (prol) 231 vld1.s8 d6, [r8] @col 8::15 load (prol extra) 295 vld1.s8 d1, [r9] @row 8::15 load (prol extra [all...] |
ihevc_itrans_recon_4x4_ttype1.s | 134 vld1.16 d0,[r0],r4 @loading pi2_src 1st row 136 vld1.16 d1,[r0],r4 @loading pi2_src 2nd row 138 vld1.16 d2,[r0],r4 @loading pi2_src 3rd row 140 vld1.16 d3,[r0],r4 @loading pi2_src 4th row 166 vld1.32 d18[0], [r2],r5 181 vld1.32 d18[1], [r2],r5 195 vld1.32 d19[0], [r2],r5 206 vld1.32 d19[1], [r2],r5
|
/hardware/samsung_slsi/exynos5/libswconverter/ |
csc_tiled_to_linear_y_neon.s | 86 vld1.8 {q0, q1}, [r8]! 87 vld1.8 {q2, q3}, [r8]! 89 vld1.8 {q4, q5}, [r8]! 90 vld1.8 {q6, q7}, [r8]! 93 vld1.8 {q8, q9}, [r8]! 95 vld1.8 {q10, q11}, [r8]! 98 vld1.8 {q12, q13}, [r8]! 99 vld1.8 {q14, q15}, [r8]! 177 vld1.8 {q0}, [r8]! 178 vld1.8 {q1}, [r8] [all...] |
/external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
vp9_mb_lpf_neon.asm | 34 vld1.8 {d16[]}, [r2] ; load *blimit 35 vld1.8 {d17[]}, [r3] ; load *limit 36 vld1.8 {d18[]}, [r4] ; load *thresh 40 vld1.u8 {d0}, [r8@64], r1 ; p7 41 vld1.u8 {d1}, [r8@64], r1 ; p6 42 vld1.u8 {d2}, [r8@64], r1 ; p5 43 vld1.u8 {d3}, [r8@64], r1 ; p4 44 vld1.u8 {d4}, [r8@64], r1 ; p3 45 vld1.u8 {d5}, [r8@64], r1 ; p2 46 vld1.u8 {d6}, [r8@64], r1 ; p [all...] |
/external/libvpx/libvpx/vp8/common/arm/neon/ |
sixtappredict8x8_neon.asm | 51 vld1.s32 {q14, q15}, [r2] ;load first_pass filter 70 vld1.u8 {q3}, [r0], r1 ;load src data 72 vld1.u8 {q4}, [r0], r1 74 vld1.u8 {q5}, [r0], r1 76 vld1.u8 {q6}, [r0], r1 145 vld1.u8 {q3}, [r0], r1 ;load src data 153 vld1.u8 {q4}, [r0], r1 155 vld1.u8 {q5}, [r0], r1 157 vld1.u8 {q6}, [r0], r1 163 ;vld1.u8 {q3}, [r0], r1 ;load src dat [all...] |
sixtappredict4x4_neon.asm | 49 vld1.s32 {q14, q15}, [r2] ;load first_pass filter 60 vld1.u8 {q3}, [r0], r1 ;load first 4-line src data 62 vld1.u8 {q4}, [r0], r1 64 vld1.u8 {q5}, [r0], r1 66 vld1.u8 {q6}, [r0], r1 124 vld1.u8 {q3}, [r0], r1 ;load rest 5-line src data 125 vld1.u8 {q4}, [r0], r1 130 vld1.u8 {q5}, [r0], r1 131 vld1.u8 {q6}, [r0], r1 137 vld1.u8 {q11}, [r0], r [all...] |
idct_dequant_full_2x_neon.asm | 25 vld1.16 {q0, q1}, [r1] ; dq (same l/r) 26 vld1.16 {q2, q3}, [r0] ; l q 28 vld1.16 {q4, q5}, [r0] ; r q 32 vld1.32 {d28[0]}, [r2], r3 ; l pre 33 vld1.32 {d28[1]}, [r12], r3 ; r pre 34 vld1.32 {d29[0]}, [r2], r3 35 vld1.32 {d29[1]}, [r12], r3 36 vld1.32 {d30[0]}, [r2], r3 37 vld1.32 {d30[1]}, [r12], r3 38 vld1.32 {d31[0]}, [r2], r [all...] |
/external/libvpx/libvpx/vp9/common/arm/neon/ |
vp9_mb_lpf_neon.asm | 34 vld1.8 {d16[]}, [r2] ; load *blimit 35 vld1.8 {d17[]}, [r3] ; load *limit 36 vld1.8 {d18[]}, [r4] ; load *thresh 40 vld1.u8 {d0}, [r8@64], r1 ; p7 41 vld1.u8 {d1}, [r8@64], r1 ; p6 42 vld1.u8 {d2}, [r8@64], r1 ; p5 43 vld1.u8 {d3}, [r8@64], r1 ; p4 44 vld1.u8 {d4}, [r8@64], r1 ; p3 45 vld1.u8 {d5}, [r8@64], r1 ; p2 46 vld1.u8 {d6}, [r8@64], r1 ; p [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
vp9_mb_lpf_neon.asm | 34 vld1.8 {d16[]}, [r2] ; load *blimit 35 vld1.8 {d17[]}, [r3] ; load *limit 36 vld1.8 {d18[]}, [r4] ; load *thresh 40 vld1.u8 {d0}, [r8@64], r1 ; p7 41 vld1.u8 {d1}, [r8@64], r1 ; p6 42 vld1.u8 {d2}, [r8@64], r1 ; p5 43 vld1.u8 {d3}, [r8@64], r1 ; p4 44 vld1.u8 {d4}, [r8@64], r1 ; p3 45 vld1.u8 {d5}, [r8@64], r1 ; p2 46 vld1.u8 {d6}, [r8@64], r1 ; p [all...] |
/external/llvm/test/MC/ARM/ |
neon-vld-vst-align.s | 5 vld1.8 {d0}, [r4] 6 vld1.8 {d0}, [r4:16] 7 vld1.8 {d0}, [r4:32] 8 vld1.8 {d0}, [r4:64] 9 vld1.8 {d0}, [r4:128] 10 vld1.8 {d0}, [r4:256] 12 @ CHECK: vld1.8 {d0}, [r4] @ encoding: [0x24,0xf9,0x0f,0x07] 14 @ CHECK-ERRORS: vld1.8 {d0}, [r4:16] 17 @ CHECK-ERRORS: vld1.8 {d0}, [r4:32] 19 @ CHECK: vld1.8 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x07 [all...] |
/external/libvpx/libvpx/vp8/encoder/arm/neon/ |
shortfdct_neon.asm | 35 vld1.16 {d0}, [r0@64], r2 37 vld1.16 {d1}, [r0@64], r2 38 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=2217 39 vld1.16 {d2}, [r0@64], r2 40 vld1.32 {q9, q10}, [r12@128]! ; q9=14500, q10=7500 41 vld1.16 {d3}, [r0@64], r2 46 vld1.32 {q11,q12}, [r12@128] ; q11=12000, q12=51000 116 vld1.16 {q0}, [r0@128], r2 118 vld1.16 {q1}, [r0@128], r2 119 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=221 [all...] |
/external/openssl/crypto/modes/asm/ |
ghashv8-armx.S | 10 vld1.64 {q9},[r1] @ load H 34 vld1.64 {q9},[r0] @ load Xi 36 vld1.64 {q12},[r1] @ load twisted H 54 vld1.64 {q0},[r0] @ load [rotated] Xi 58 vld1.64 {q12},[r1] @ load twisted H 62 vld1.64 {q9},[r2],r12 @ load [rotated] inp 89 vld1.64 {q9},[r2],r12 @ load [rotated] inp
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/neon/ |
shortfdct_neon.asm | 35 vld1.16 {d0}, [r0@64], r2 37 vld1.16 {d1}, [r0@64], r2 38 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=2217 39 vld1.16 {d2}, [r0@64], r2 40 vld1.32 {q9, q10}, [r12@128]! ; q9=14500, q10=7500 41 vld1.16 {d3}, [r0@64], r2 46 vld1.32 {q11,q12}, [r12@128] ; q11=12000, q12=51000 116 vld1.16 {q0}, [r0@128], r2 118 vld1.16 {q1}, [r0@128], r2 119 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=221 [all...] |
/external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
downsample_fast_neon.S | 63 @ move the pointer back to original after advancing 16 bytes by a vld1, and 92 vld1.16 {d2[], d3[]}, [r7], r4 @ coefficients[j] 93 vld1.16 d0[0], [r1], r5 @ data_in[i - j] 94 vld1.16 d0[1], [r1], r5 @ data_in[i + factor - j] 95 vld1.16 d0[2], [r1], r5 @ data_in[i + factor * 2 - j] 96 vld1.16 d0[3], [r1], r5 @ data_in[i + factor * 3 - j] 97 vld1.16 d1[0], [r1], r5 @ data_in[i + factor * 4 - j] 98 vld1.16 d1[1], [r1], r5 @ data_in[i + factor * 5 - j] 99 vld1.16 d1[2], [r1], r5 @ data_in[i + factor * 6 - j] 100 vld1.16 d1[3], [r1], r10 @ data_in[i + factor * 7 - j [all...] |
/external/chromium_org/third_party/libjpeg_turbo/simd/ |
jsimd_arm_neon.S | 241 vld1.16 {d16, d17, d18, d19}, [COEF_BLOCK, :128]! 242 vld1.16 {d0, d1, d2, d3}, [DCT_TABLE, :128]! 243 vld1.16 {d20, d21, d22, d23}, [COEF_BLOCK, :128]! 245 vld1.16 {d4, d5, d6, d7}, [DCT_TABLE, :128]! 247 vld1.16 {d24, d25, d26, d27}, [COEF_BLOCK, :128]! 249 vld1.16 {d0, d1, d2, d3}, [DCT_TABLE, :128]! 251 vld1.16 {d28, d29, d30, d31}, [COEF_BLOCK, :128] 253 vld1.16 {d4, d5, d6, d7}, [DCT_TABLE, :128]! 256 vld1.16 {d0, d1, d2, d3}, [ip, :128] /* load constants */ 335 vld1.s16 {d2}, [ip, :64] /* reload constants * [all...] |