| /external/llvm/test/CodeGen/ARM/ |
| returned-ext.ll | 16 ; CHECKELF: uxth r0, r0
22 ; CHECKT2D: uxth r0, r0
41 ; CHECKELF-NOT: uxth r0, {{r[0-9]+}}
53 ; CHECKT2D-NOT: uxth r0, {{r[0-9]+}}
88 ; CHECKELF: uxth r0, r0
90 ; CHECKELF: uxth r0, r0
94 ; CHECKT2D: uxth r0, r0
96 ; CHECKT2D: uxth r0, r0
112 ; scheduling of uxth and mov instructions below in lieu of the 'returned'
137 ; CHECKELF: uxth r0, r
[all...] |
| uxt_rot.ll | 30 ; CHECK: uxth
31 ; CHECK-NOT: uxth
|
| extload-knownzero.ll | 14 ; CHECK-NOT: uxth
|
| fast-isel-fold.ll | 25 ; ARM-NOT: uxth
28 ; THUMB-NOT: uxth
54 ; ARM-NOT: uxth
57 ; THUMB-NOT: uxth
|
| fast-isel-icmp.ll | 23 ; ARM: uxth r0, r0
24 ; ARM: uxth r1, r1
27 ; THUMB: uxth r0, r0
28 ; THUMB: uxth r1, r1
|
| fast-isel-ret.ll | 46 ; CHECK: uxth r0, r0
54 ; CHECK-NOT: uxth
|
| dagcombine-anyexttozeroext.ll | 25 ; CHECK-NOT: uxth
|
| ldaex-stlex.ll | 46 ; CHECK-NOT: uxth
75 ; CHECK-NOT: uxth
|
| fast-isel-conversion.ll | 118 ; ARM: uxth r0, r0
122 ; THUMB: uxth r0, r0
164 ; ARM: uxth r0, r0
168 ; THUMB: uxth r0, r0
|
| fast-isel.ll | 86 ; THUMB: uxth
91 ; ARM: uxth
|
| ldstrex.ll | 48 ; CHECK-NOT: uxth
77 ; CHECK-NOT: uxth
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-sxt-uxt.ll | 19 ; CHECK: uxth
|
| thumb2-uxt_rot.ll | 28 ; A8: uxth.w r0, r0, ror #8
|
| /external/llvm/test/MC/ARM/ |
| thumb.s | 34 uxth r3, r6
36 @ CHECK: uxth r3, r6 @ encoding: [0xb3,0xb2]
|
| /external/chromium_org/third_party/skia/src/opts/ |
| SkBitmapProcState_opts_arm.cpp | 59 "uxth r4, r5 \n\t" // extract ptr 0
61 "uxth r6, r7 \n\t" // extract ptr 2
64 "uxth r8, r9 \n\t" // extract ptr 4
68 "uxth r10, r11 \n\t" // extract ptr 6
144 "uxth r4, r5 \n\t" // extract ptr 0
146 "uxth r6, r7 \n\t" // extract ptr 2
149 "uxth r8, r9 \n\t" // extract ptr 4
153 "uxth r10, r11 \n\t" // extract ptr 6
|
| /external/skia/src/opts/ |
| SkBitmapProcState_opts_arm.cpp | 58 "uxth r4, r5 \n\t" // extract ptr 0
60 "uxth r6, r7 \n\t" // extract ptr 2
63 "uxth r8, r9 \n\t" // extract ptr 4
67 "uxth r10, r11 \n\t" // extract ptr 6
143 "uxth r4, r5 \n\t" // extract ptr 0
145 "uxth r6, r7 \n\t" // extract ptr 2
148 "uxth r8, r9 \n\t" // extract ptr 4
152 "uxth r10, r11 \n\t" // extract ptr 6
|
| /external/llvm/test/CodeGen/AArch64/ |
| addsub_ext.ll | 97 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, uxth
102 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, uxth #3
109 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxth
114 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxth #1
142 ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}, uxth
|
| arm64-fast-isel-call.ll | 54 ; CHECK: uxth w1, w1
83 ; CHECK: uxth w2, w[[REG]]
|
| arm64-ldxr-stxr.ll | 52 ; CHECK-NOT: uxth
105 ; CHECK-NOT: uxth
189 ; CHECK-NOT: uxth
242 ; CHECK-NOT: uxth
|
| arm64-fast-isel-icmp.ll | 158 ; CHECK: uxth w0, w0
159 ; CHECK: uxth w1, w1
|
| /external/llvm/test/MC/AArch64/ |
| arm64-arithmetic-encoding.s | 171 add w1, w2, w3, uxth
180 ; CHECK: add w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x0b]
189 add x1, x2, w3, uxth
196 ; CHECK: add x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0x8b]
215 sub w1, w2, w3, uxth
224 ; CHECK: sub w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x4b]
233 sub x1, x2, w3, uxth
240 ; CHECK: sub x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0xcb]
259 adds w1, w2, w3, uxth
268 ; CHECK: adds w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x2b
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| unpredictable-AExtI-arm.txt | 41 # CHECK: uxth
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_PredictIntraChroma_8x8_s.s | 171 UXTH sum1, sum1 ;// upsum1 (Clear the top junk bits)
172 UXTH sum2, sum2 ;// upsum2 (Clear the top junk bits)
240 UXTH sum1, sum1 ;// upsum1 (Clear the top junk bits)
241 UXTH sum2, sum2 ;// upsum2 (Clear the top junk bits)
456 UXTH c, c ;// only in half word
463 UXTH b, b
464 UXTH tVal7, tVal7
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-arithmetic.txt | 174 # CHECK: add w1, w2, w3, uxth
190 # CHECK: add x1, x2, w3, uxth
216 # CHECK: sub w1, w2, w3, uxth
232 # CHECK: sub x1, x2, w3, uxth
258 # CHECK: adds w1, w2, w3, uxth
274 # CHECK: adds x1, x2, w3, uxth
296 # CHECK: subs w1, w2, w3, uxth
312 # CHECK: subs x1, x2, w3, uxth
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 41 UXTH,
61 case AArch64_AM::UXTH: return "uxth";
128 case 1: return AArch64_AM::UXTH;
144 /// 001 ==> uxth
155 case AArch64_AM::UXTH: return 1; break;
191 /// 001 ==> uxth
|
