| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/x86_64-linux/include/c++/4.6/ext/ |
| atomicity.h | 47 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
48 { return __sync_fetch_and_add(__mem, __val); }
51 __atomic_add(volatile _Atomic_word* __mem, int __val)
52 { __sync_fetch_and_add(__mem, __val); }
64 __exchange_and_add_single(_Atomic_word* __mem, int __val)
66 _Atomic_word __result = *__mem;
67 *__mem += __val;
72 __atomic_add_single(_Atomic_word* __mem, int __val)
73 { *__mem += __val; }
77 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/c++/4.8.3/ext/ |
| atomicity.h | 48 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
49 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
52 __atomic_add(volatile _Atomic_word* __mem, int __val)
53 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
65 __exchange_and_add_single(_Atomic_word* __mem, int __val)
67 _Atomic_word __result = *__mem;
68 *__mem += __val;
73 __atomic_add_single(_Atomic_word* __mem, int __val)
74 { *__mem += __val; }
78 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/5/sources/cxx-stl/gnu-libstdc++/include/ext/ |
| atomicity.h | 45 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
46 { return __sync_fetch_and_add(__mem, __val); }
49 __atomic_add(volatile _Atomic_word* __mem, int __val)
50 { __sync_fetch_and_add(__mem, __val); }
62 __exchange_and_add_single(_Atomic_word* __mem, int __val)
64 _Atomic_word __result = *__mem;
65 *__mem += __val;
70 __atomic_add_single(_Atomic_word* __mem, int __val)
71 { *__mem += __val; }
75 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/6/sources/cxx-stl/gnu-libstdc++/include/ext/ |
| atomicity.h | 45 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
46 { return __sync_fetch_and_add(__mem, __val); }
49 __atomic_add(volatile _Atomic_word* __mem, int __val)
50 { __sync_fetch_and_add(__mem, __val); }
62 __exchange_and_add_single(_Atomic_word* __mem, int __val)
64 _Atomic_word __result = *__mem;
65 *__mem += __val;
70 __atomic_add_single(_Atomic_word* __mem, int __val)
71 { *__mem += __val; }
75 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/7/sources/cxx-stl/gnu-libstdc++/include/ext/ |
| atomicity.h | 45 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
46 { return __sync_fetch_and_add(__mem, __val); }
49 __atomic_add(volatile _Atomic_word* __mem, int __val)
50 { __sync_fetch_and_add(__mem, __val); }
62 __exchange_and_add_single(_Atomic_word* __mem, int __val)
64 _Atomic_word __result = *__mem;
65 *__mem += __val;
70 __atomic_add_single(_Atomic_word* __mem, int __val)
71 { *__mem += __val; }
75 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/8/sources/cxx-stl/gnu-libstdc++/4.4.3/include/ext/ |
| atomicity.h | 45 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
46 { return __sync_fetch_and_add(__mem, __val); }
49 __atomic_add(volatile _Atomic_word* __mem, int __val)
50 { __sync_fetch_and_add(__mem, __val); }
62 __exchange_and_add_single(_Atomic_word* __mem, int __val)
64 _Atomic_word __result = *__mem;
65 *__mem += __val;
70 __atomic_add_single(_Atomic_word* __mem, int __val)
71 { *__mem += __val; }
75 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/8/sources/cxx-stl/gnu-libstdc++/4.6/include/ext/ |
| atomicity.h | 47 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
48 { return __sync_fetch_and_add(__mem, __val); }
51 __atomic_add(volatile _Atomic_word* __mem, int __val)
52 { __sync_fetch_and_add(__mem, __val); }
64 __exchange_and_add_single(_Atomic_word* __mem, int __val)
66 _Atomic_word __result = *__mem;
67 *__mem += __val;
72 __atomic_add_single(_Atomic_word* __mem, int __val)
73 { *__mem += __val; }
77 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/8/sources/cxx-stl/gnu-libstdc++/4.7/include/ext/ |
| atomicity.h | 47 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
48 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
51 __atomic_add(volatile _Atomic_word* __mem, int __val)
52 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
64 __exchange_and_add_single(_Atomic_word* __mem, int __val)
66 _Atomic_word __result = *__mem;
67 *__mem += __val;
72 __atomic_add_single(_Atomic_word* __mem, int __val)
73 { *__mem += __val; }
77 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.6/include/ext/ |
| atomicity.h | 47 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
48 { return __sync_fetch_and_add(__mem, __val); }
51 __atomic_add(volatile _Atomic_word* __mem, int __val)
52 { __sync_fetch_and_add(__mem, __val); }
64 __exchange_and_add_single(_Atomic_word* __mem, int __val)
66 _Atomic_word __result = *__mem;
67 *__mem += __val;
72 __atomic_add_single(_Atomic_word* __mem, int __val)
73 { *__mem += __val; }
77 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.8/include/ext/ |
| atomicity.h | 48 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
49 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
52 __atomic_add(volatile _Atomic_word* __mem, int __val)
53 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
65 __exchange_and_add_single(_Atomic_word* __mem, int __val)
67 _Atomic_word __result = *__mem;
68 *__mem += __val;
73 __atomic_add_single(_Atomic_word* __mem, int __val)
74 { *__mem += __val; }
78 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.9/include/ext/ |
| atomicity.h | 48 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
49 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
52 __atomic_add(volatile _Atomic_word* __mem, int __val)
53 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
65 __exchange_and_add_single(_Atomic_word* __mem, int __val)
67 _Atomic_word __result = *__mem;
68 *__mem += __val;
73 __atomic_add_single(_Atomic_word* __mem, int __val)
74 { *__mem += __val; }
78 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/x86_64-linux/include/c++/4.8/ext/ |
| atomicity.h | 49 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
50 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
53 __atomic_add(volatile _Atomic_word* __mem, int __val)
54 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
66 __exchange_and_add_single(_Atomic_word* __mem, int __val)
68 _Atomic_word __result = *__mem;
69 *__mem += __val;
74 __atomic_add_single(_Atomic_word* __mem, int __val)
75 { *__mem += __val; }
79 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.7/include/ext/ |
| atomicity.h | 48 __exchange_and_add(volatile _Atomic_word* __mem, int __val)
49 { return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
52 __atomic_add(volatile _Atomic_word* __mem, int __val)
53 { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }
65 __exchange_and_add_single(_Atomic_word* __mem, int __val)
67 _Atomic_word __result = *__mem;
68 *__mem += __val;
73 __atomic_add_single(_Atomic_word* __mem, int __val)
74 { *__mem += __val; }
78 __exchange_and_add_dispatch(_Atomic_word* __mem, int __val
[all...] |
| /external/clang/test/CodeGen/ |
| linux-arm-atomic.c | 8 _Atomic_word exchange_and_add(volatile _Atomic_word *__mem, int __val) {
9 return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL);
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val);
[all...] |
