| /bionic/libc/arch-arm/denver/bionic/ |
| memmove.S | 37 #define CACHE_LINE_SIZE (64)
40 #define PREFETCH_DISTANCE_NEAR (CACHE_LINE_SIZE*4)
41 #define PREFETCH_DISTANCE_MID (CACHE_LINE_SIZE*4)
42 #define PREFETCH_DISTANCE_FAR (CACHE_LINE_SIZE*16)
66 pld [r1, #-CACHE_LINE_SIZE]
67 pld [r1, #-CACHE_LINE_SIZE*2]
118 pld [r1, #-CACHE_LINE_SIZE*3]
119 pld [r1, #-CACHE_LINE_SIZE*4]
140 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32]
148 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32
[all...] |
| memcpy_base.S | 30 #define CACHE_LINE_SIZE (64)
31 #define PREFETCH_DISTANCE (CACHE_LINE_SIZE*6)
44 pld [r1, #CACHE_LINE_SIZE*1]
54 pld [r1, #CACHE_LINE_SIZE*2]
57 pld [r1, #CACHE_LINE_SIZE*3]
|
| /bionic/libc/arch-arm/bionic/ |
| memcmp.S | 34 #define CACHE_LINE_SIZE 32
36 #define CACHE_LINE_SIZE 64
44 pld [r0, #(CACHE_LINE_SIZE * 0)]
45 pld [r0, #(CACHE_LINE_SIZE * 1)]
52 pld [r1, #(CACHE_LINE_SIZE * 0)]
53 pld [r1, #(CACHE_LINE_SIZE * 1)]
69 pld [r0, #(CACHE_LINE_SIZE * 2)]
70 pld [r1, #(CACHE_LINE_SIZE * 2)]
74 pld [r0, #(CACHE_LINE_SIZE * 2)]
76 pld [r1, #(CACHE_LINE_SIZE * 2)
[all...] |
| memcpy.S | 39 #define CACHE_LINE_SIZE 32
42 #define CACHE_LINE_SIZE 64
48 pld [r1, #(CACHE_LINE_SIZE * 0)]
50 pld [r1, #(CACHE_LINE_SIZE * 1)]
90 pld [r1, #(CACHE_LINE_SIZE * 0)]
91 pld [r1, #(CACHE_LINE_SIZE * 1)]
118 pld [r1, #(CACHE_LINE_SIZE * 2)]
119 pld [r1, #(CACHE_LINE_SIZE * 3)]
125 pld [r1, #(CACHE_LINE_SIZE * 2)]
126 pld [r1, #(CACHE_LINE_SIZE * 3)
[all...] |
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_tiled_to_linear_y_neon.s | 52 .equ CACHE_LINE_SIZE, 64
85 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
88 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
92 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
97 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
|
| csc_tiled_to_linear_uv_neon.s | 51 .equ CACHE_LINE_SIZE, 64
84 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
89 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
|
| csc_tiled_to_linear_uv_deinterleave_neon.s | 54 .equ CACHE_LINE_SIZE, 64
90 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
95 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
|
| csc_ARGB8888_to_YUV420SP_NEON.s | 24 .equ CACHE_LINE_SIZE, 32
63 pld [r2, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
139 pld [r5, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
|
| /external/pixman/pixman/ |
| pixman-fast-path.c | [all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/x86_64-linux/include/c++/4.8/parallel/ |
| settings.h | 265 unsigned int cache_line_size; member in struct:__gnu_parallel::_Settings
335 cache_line_size(64),
|
| workstealing.h | 120 const int __stride = (__s.cache_line_size * 10
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/c++/4.8.3/parallel/ |
| settings.h | 265 unsigned int cache_line_size; member in struct:__gnu_parallel::_Settings
335 cache_line_size(64),
|
| workstealing.h | 120 const int __stride = (__s.cache_line_size * 10
|
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.8/include/parallel/ |
| settings.h | 265 unsigned int cache_line_size; member in struct:__gnu_parallel::_Settings
335 cache_line_size(64),
|
| workstealing.h | 120 const int __stride = (__s.cache_line_size * 10
|
| /prebuilts/ndk/9/sources/cxx-stl/gnu-libstdc++/4.9/include/parallel/ |
| settings.h | 265 unsigned int cache_line_size; member in struct:__gnu_parallel::_Settings
335 cache_line_size(64),
|
| workstealing.h | 120 const int __stride = (__s.cache_line_size * 10
|
| /external/chromium_org/v8/src/arm/ |
| codegen-arm.cc | 109 if (CpuFeatures::cache_line_size() == 32) {
115 if (CpuFeatures::cache_line_size() == 32) {
121 if (CpuFeatures::cache_line_size() == 32) {
125 if (CpuFeatures::cache_line_size() == 32) {
135 if (CpuFeatures::cache_line_size() == 32) {
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| processor_32.h | 322 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| processor_32.h | 322 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| processor_32.h | 322 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| processor_32.h | 322 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| processor_32.h | 322 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| processor_32.h | 346 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
| /prebuilts/ndk/8/platforms/android-14/arch-x86/usr/include/asm/ |
| processor_32.h | 346 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
|
