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  /external/llvm/test/MC/ARM/
thumb2-cbn-to-next-inst.s 8 cbnz r2, L1 @ this can't be encoded, must turn into a nop
11 cbnz r2, L2
26 @ CHECK: a: 0a b9 cbnz r2, #2
  /external/llvm/test/CodeGen/AArch64/
compare-branch.ll 18 ; CHECK: cbnz {{w[0-9]+}}, .LBB
30 ; CHECK: cbnz {{x[0-9]+}}, .LBB
arm64-atomic-128.ll 12 ; CHECK: cbnz [[MISMATCH]], [[DONE:.LBB[0-9]+_[0-9]+]]
14 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
30 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
46 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
62 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
78 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
100 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
122 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
144 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
166 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]
    [all...]
cmpxchg-idioms.ll 12 ; CHECK: cbnz [[STATUS]], [[LOOP]]
38 ; CHECK: cbnz [[STATUS]], [[LOOP]]
67 ; CHECK: cbnz [[STATUS]], [[LOOP]]
atomic-ops.ll 28 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
48 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
68 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
88 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
108 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
128 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
148 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
168 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
188 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
208 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_
    [all...]
arm64-atomic.ll 11 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
27 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
42 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
56 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
70 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
83 ; CHECK: cbnz [[SCRATCH_REG]], [[LABEL]]
analyze-branch.ll 64 ; CHECK: cbnz {{w[0-9]+}}, [[FALSE:.LBB[0-9]+_[0-9]+]]
127 ; CHECK: cbnz {{x[0-9]+}}, [[TRUE:.LBB[0-9]+_[0-9]+]]
  /bionic/libc/private/
bionic_atomic_arm64.h 36 " cbnz %w0, 1b\n"
51 " cbnz %w1, 1b\n"
65 " cbnz %w2, 1b"
  /external/chromium_org/base/
atomicops_internals_arm64_gcc.h 47 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
69 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
90 "cbnz %w[temp], 0b \n\t" // Retry on failure.
183 "cbnz %w[temp], 0b \n\t"
205 "cbnz %w[temp], 0b \n\t"
226 "cbnz %w[temp], 0b \n\t"
  /external/chromium_org/third_party/protobuf/src/google/protobuf/stubs/
atomicops_internals_arm64_gcc.h 64 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
86 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
107 "cbnz %w[temp], 0b \n\t" // Retry on failure.
200 "cbnz %w[temp], 0b \n\t"
222 "cbnz %w[temp], 0b \n\t"
243 "cbnz %w[temp], 0b \n\t"
  /external/chromium_org/v8/src/base/
atomicops_internals_arm64_gcc.h 37 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
59 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
80 "cbnz %w[temp], 0b \n\t" // Retry on failure.
187 "cbnz %w[temp], 0b \n\t"
209 "cbnz %w[temp], 0b \n\t"
230 "cbnz %w[temp], 0b \n\t"
  /external/compiler-rt/lib/builtins/arm/
sync-ops.h 28 cbnz r3, LOCAL_LABEL(tryatomic_ ## op) ; \
43 cbnz r6, LOCAL_LABEL(tryatomic_ ## op) ; \
  /external/llvm/test/CodeGen/Thumb2/
thumb2-cbnz.ll 27 ; CHECK-NEXT: cbnz
  /bionic/libc/arch-arm64/generic/bionic/
string_copy.S 122 cbnz has_nul1, .Lnul_in_data1
126 cbnz has_nul2, .Lnul_in_data2
202 cbnz data1_w, 1f
215 cbnz data2_w, 1f
memchr.S 112 cbnz synd, .Ltail
memcmp.S 77 cbnz limit_wd, .Lnot_limit
strcmp.S 104 cbnz has_nul, 1f
  /art/runtime/arch/arm/
quick_entrypoints_arm.S 150 cbnz r0, 1f @ result non-zero branch over
379 cbnz r1, .Lnot_unlocked @ already thin locked
382 cbnz r3, .Lstrex_fail @ store failed, retry
389 cbnz r3, .Lslow_lock @ if either of the top two bits are set, go slow path
392 cbnz r2, .Lslow_lock @ lock word and self thread id's match -> recursive lock
396 cbnz r1, .Lslow_lock @ if we overflow the count go slow path
418 cbnz r2, .Lslow_unlock @ if either of the top two bits are set, go slow path
422 cbnz r3, .Lslow_unlock @ do lock word and self thread id's match?
615 cbnz r1, 1f @ success if no exception pending
633 cbnz r2, 1f @ success if no exception pendin
    [all...]
  /external/vixl/examples/
factorial.cc 47 __ Cbnz(x1, &loop);
sum-array.cc 54 __ Cbnz(w1, &loop);
  /external/llvm/test/MC/AArch64/
arm64-branch-encoding.s 97 cbnz w2, foo
99 cbnz x2, foo
105 cbnz x2, #-1048576
106 ; CHECK: cbnz x2, #-1048576 ; encoding: [0x02,0x00,0x80,0xb5]
  /external/llvm/test/MC/Disassembler/ARM/
thumb-printf.txt 19 # CHECK-NEXT: cbnz r0, #6
  /art/runtime/arch/arm64/
quick_entrypoints_arm64.S 325 cbnz x0, 1f // result non-zero branch over
352 cbnz \reg, 1f
368 cbnz w0, 1f // result non-zero branch over
967 cbnz w1, .Lnot_unlocked // already thin locked
969 cbnz w3, .Lstrex_fail // store failed, retry
976 cbnz w3, .Lslow_lock // if either of the top two bits are set, go slow path
979 cbnz w2, .Lslow_lock // lock word and self thread id's match -> recursive lock
983 cbnz w1, .Lslow_lock // if we overflow the count go slow path
1006 cbnz w2, .Lslow_unlock // if either of the top two bits are set, go slow path
1010 cbnz w3, .Lslow_unlock // do lock word and self thread id's match
    [all...]
memcmp16_arm64.S 72 cbnz limit_wd, .Lnot_limit
  /art/compiler/utils/arm/
assembler_thumb2.h 161 void cbnz(Register rn, Label* target) OVERRIDE;
475 // We also need to deal with a cbz/cbnz instruction that becomes too big for its offset
492 kCompareAndBranchNonZero, // cbnz.
547 // Move a cbz/cbnz branch. This is always forward.
597 // cbz/cbnz instructions when they are converted to cmp/b<cond>

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