| /external/elfutils/0.153/backends/ |
| x86_64_corenote.c | 42 #define GR(at, n, dwreg) \
43 { .offset = at * 8, .regno = dwreg, .count = n, .bits = 64 }
44 #define SR(at, n, dwreg) \
45 { .offset = at * 8, .regno = dwreg, .count = n, .bits = 16, .pad = 6 }
|
| i386_corenote.c | 42 #define GR(at, n, dwreg) \
43 { .offset = at * 4, .regno = dwreg, .count = n, .bits = 32 }
44 #define SR(at, n, dwreg) \
45 { .offset = at * 4, .regno = dwreg, .count = n, .bits = 16, .pad = 2 }
|
| sh_corenote.c | 42 #define GR(at, n, dwreg) \
43 { .offset = at * 4, .regno = dwreg, .count = n, .bits = 32 }
|
| sparc_corenote.c | 45 #define GR(at, n, dwreg) \
46 { .offset = at * BITS/8, .regno = dwreg, .count = n, .bits = BITS }
|
| ppc_corenote.c | 47 #define GR(at, n, dwreg) \
48 { .offset = at * BITS/8, .regno = dwreg, .count = n, .bits = BITS }
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfUnit.cpp | 496 int DWReg = RI->getDwarfRegNum(Reg, false);
497 bool isSubRegister = DWReg < 0;
502 for (MCSuperRegIterator SR(Reg, RI); SR.isValid() && DWReg < 0; ++SR) {
503 DWReg = RI->getDwarfRegNum(*SR, false);
504 if (DWReg >= 0)
508 if (DWReg < 0) {
515 if (DWReg < 32)
516 addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_reg0 + DWReg);
519 addUInt(TheDie, dwarf::DW_FORM_udata, DWReg);
542 unsigned DWReg = RI->getDwarfRegNum(Reg, false)
[all...] |
| /external/valgrind/main/coregrind/m_debuginfo/ |
| readdwarf.c | 2556 Int dwreg __attribute__((unused)); local
[all...] |
| priv_storage.h | 396 } DwReg;
[all...] |
| storage.c | 649 e.Cex.DwReg.reg = reg;
735 VG_(printf)("dwr%d", e->Cex.DwReg.reg);
[all...] |
