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Searched
full:imull
(Results
1 - 25
of
58
) sorted by null
1
2
3
/external/llvm/test/MC/X86/AlignedBundling/
different-sections.s
9
imull
$17, %ebx, %ebp
10
imull
$17, %ebx, %ebp
12
imull
$17, %ebx, %ebp
14
# CHECK-NEXT: 8:
imull
18
imull
$17, %ebx, %ebp
19
imull
$17, %ebx, %ebp
21
imull
$17, %ebx, %ebp
23
# CHECK-NEXT: 8:
imull
switch-section-locked-error.s
10
imull
$17, %ebx, %ebp
12
imull
$17, %ebx, %ebp
15
imull
$17, %ebx, %ebp
align-mode-argument-error.s
7
imull
$17, %ebx, %ebp
bundle-lock-option-error.s
8
imull
$17, %ebx, %ebp
lock-without-bundle-mode-error.s
7
imull
$17, %ebx, %ebp
single-inst-bundling.s
18
imull
$17, %ebx, %ebp
19
# This
imull
is 3 bytes long and should have started at 0xe, so two bytes
22
# CHECK-NEXT: 10:
imull
38
imull
%ebx, %eax
unlock-without-lock-error.s
8
imull
$17, %ebx, %ebp
relax-in-bundle-group.s
15
imull
$17, %ebx, %ebp
38
imull
%ebx, %eax
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/gas64/
gas-muldiv.asm
6
imull
%ebx, %ecx
label
9
imull
$5, %ebx, %ecx
label
12
imull
$5000, %ebx, %ecx
label
15
imull
$5, %ecx
label
18
imull
$5000, %ecx
label
/external/llvm/test/CodeGen/X86/
atom-sched.ll
14
; atom:
imull
16
; atom:
imull
17
; slm:
imull
19
; slm:
imull
20
; CHECK:
imull
22
; CHECK:
imull
sdiv-exact.ll
7
; CHECK:
imull
$-1030792151, 4(%esp)
16
; CHECK-NEXT:
imull
$-1431655765
subreg-to-reg-3.ll
3
; CHECK:
imull
misched-matrix.ll
20
; TOPDOWN:
imull
{{[0-9]*}}(
22
; TOPDOWN:
imull
{{[0-9]*}}(
28
; scheduled independently, and that the
imull
/adds are interleaved.
32
; ILPMIN:
imull
33
; ILPMIN:
imull
35
; ILPMIN:
imull
37
; ILPMIN:
imull
40
; ILPMIN:
imull
41
; ILPMIN:
imull
43
; ILPMIN:
imull
[
all
...]
divide-by-constant.ll
10
; CHECK:
imull
$63551, %eax
21
; CHECK:
imull
$43691, %eax
33
; CHECK-NEXT:
imull
$171, %eax
43
; CHECK:
imull
$1986, %eax
59
; CHECK:
imull
$26215, %eax, %ecx
81
; CHECK:
imull
$211
91
; CHECK:
imull
$71
misched-balance.ll
12
;
imull
folded loads should be in order and interleaved with addl, never
20
; CHECK:
imull
4
21
; CHECK-NOT: {{
imull
|rsp}}
23
; CHECK:
imull
8
24
; CHECK-NOT: {{
imull
|rsp}}
26
; CHECK:
imull
12
27
; CHECK-NOT: {{
imull
|rsp}}
29
; CHECK:
imull
16
30
; CHECK-NOT: {{
imull
|rsp}}
32
; CHECK:
imull
2
[
all
...]
memset-2.ll
28
; CHECK:
imull
$16843009
36
; CHECK:
imull
$16843009
2010-09-01-RemoveCopyByCommutingDef.ll
13
; The
imull
clobbers a 32-bit register.
14
; CHECK:
imull
%{{...}}, %e[[CLOBBER:..]]
smul-with-overflow.ll
21
; CHECK:
imull
40
; CHECK:
imull
machine-cse.ll
56
; CHECK:
imull
64
; CHECK-NOT:
imull
/external/compiler-rt/lib/builtins/i386/
muldi3.S
16
imull
%eax, %ecx // b.lo * a.hi
20
imull
%edx, %ebx // a.lo * b.hi
udivdi3.S
59
imull
%edi, %eax // q*bhi
91
imull
%edi, %eax // q*bhi
umoddi3.S
60
imull
%edi, %eax // q*bhi
96
imull
%edi, %eax // q*bhi
/external/llvm/test/Instrumentation/AddressSanitizer/X86/
bug_11395.ll
63
%2 = call { i32*, i32*, i32* } asm sideeffect "1: \0A\09xor %esi, %esi\0A\09xor %ecx, %ecx\0A\09jmp *$5 \0A\09ff_mlp_firorder_8: \0A\09mov 0x1c+0($0), %eax\0A\09
imull
0x1c+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_7: \0A\09mov 0x18+0($0), %eax\0A\09
imull
0x18+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_6: \0A\09mov 0x14+0($0), %eax\0A\09
imull
0x14+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_5: \0A\09mov 0x10+0($0), %eax\0A\09
imull
0x10+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_4: \0A\09mov 0x0c+0($0), %eax\0A\09
imull
0x0c+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_3: \0A\09mov 0x08+0($0), %eax\0A\09
imull
0x08+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_2: \0A\09mov 0x04+0($0), %eax\0A\09
imull
0x04+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_1: \0A\09mov 0x00+0($0), %eax\0A\09
imull
0x00+0($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_firorder_0:\0A\09jmp *$6 \0A\09ff_mlp_iirorder_4: \0A\09mov 0x0c+4*(8 + (40 * 4))($0), %eax\0A\09
imull
0x0c+4* 8($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09ff_mlp_iirorder_3: \0A\09mov 0x08+4*(8 + (40 * 4))($0), %eax\0A\09
imull
0x08+4* 8($1) \0A\09add %eax , %esi\0A\09adc %edx , %ecx\0A\09 (…)
[
all
...]
/art/compiler/utils/x86/
assembler_x86.h
379
void
imull
(Register dst, Register src);
380
void
imull
(Register reg, const Immediate& imm);
381
void
imull
(Register reg, const Address& address);
383
void
imull
(Register reg);
384
void
imull
(const Address& address);
/external/chromium_org/third_party/boringssl/linux-x86/crypto/bn/
x86-mont.S
78
imull
32(%esp),%edi
111
imull
32(%esp),%edi
193
imull
32(%esp),%edi
285
imull
32(%esp),%edi
Completed in 174 milliseconds
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