/external/chromium_org/v8/src/arm64/ |
debug-arm64.cc | 28 // lrd ip0, [pc, #(3 * kInstructionSize)] 29 // add sp, sp, ip0 34 // ldr ip0, [pc, #(3 * kInstructionSize)] 35 // blr ip0 49 patcher.ldr_pcrel(ip0, (3 * kInstructionSize) >> kLoadLiteralScaleLog2); 56 patcher.blr(ip0); 90 // ldr ip0, [pc, #(2 * kInstructionSize)] 91 // blr ip0 108 patcher.ldr_pcrel(ip0, (2 * kInstructionSize) >> kLoadLiteralScaleLog2); 115 patcher.blr(ip0); [all...] |
assembler-arm64-inl.h | 600 // ldr ip0, #... @ load from literal pool 601 // blr ip0 839 // ldr ip0, [pc, #offset] 840 // blr ip0 844 return i1->IsLdrLiteralX() && (i1->Rt() == ip0.code()) && 845 i2->IsBranchAndLinkToRegister() && (i2->Rn() == ip0.code()); [all...] |
deoptimizer-arm64.cc | 48 patcher.ldr_pcrel(ip0, (2 * kInstructionSize) >> kLoadLiteralScaleLog2); 49 patcher.blr(ip0);
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code-stubs-arm64.h | 43 static Register to_be_pushed_lr() { return ip0; }
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macro-assembler-arm64.cc | 46 return CPURegList(ip0, ip1); [all...] |
full-codegen-arm64.cc | 453 __ ldr_pcrel(ip0, (3 * kInstructionSize) >> kLoadLiteralScaleLog2); 454 __ add(current_sp, current_sp, ip0); [all...] |
assembler-arm64.cc | 147 // Drop ip0 and ip1 (i.e. x16 and x17), as they should not be expected to be [all...] |
assembler-arm64.h | 377 ALIAS_REGISTER(Register, ip0, x16); [all...] |
simulator-arm64.cc | 737 "ip0", "ip1", "x18", "x19", "x20", "x21", "x22", "x23", [all...] |
/art/runtime/arch/arm64/ |
registers_arm64.cc | 26 "x10", "x11", "x12", "x13", "x14", "x15", "ip0", "ip1", "x18", "x19",
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registers_arm64.h | 61 IP0 = 16, // Used as scratch by VIXL.
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/external/libunwind/src/aarch64/ |
regname.c | 46 [UNW_AARCH64_X16] = "ip0",
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/art/compiler/trampolines/ |
trampoline_compiler.cc | 75 Arm64ManagedRegister::FromCoreRegister(IP0)); 81 Arm64ManagedRegister::FromCoreRegister(IP0));
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/external/chromium_org/v8/test/cctest/ |
test-code-stubs-arm64.cc | 105 __ Pop(ip0); 106 __ cmp(reg, ip0);
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/external/clang/test/CXX/temp/temp.arg/temp.arg.nontype/ |
p1-11.cpp | 21 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter type 'int *'}} variable
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/external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
RuntimeDyld.cpp | 528 // Stub can use ip0 (== x16) to calculate address 529 *StubAddr = 0xd2e00010; // movz ip0, #:abs_g3:<addr> 531 *StubAddr = 0xf2c00010; // movk ip0, #:abs_g2_nc:<addr> 533 *StubAddr = 0xf2a00010; // movk ip0, #:abs_g1_nc:<addr> 535 *StubAddr = 0xf2800010; // movk ip0, #:abs_g0_nc:<addr> 537 *StubAddr = 0xd61f0200; // br ip0
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/external/clang/test/FixIt/ |
fixit-cxx0x.cpp | 107 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter type 'int *'}} variable
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/external/valgrind/main/docs/internals/ |
register-uses.txt | 149 r16(IP0)
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 306 // Remove dst and base form the temp list - higher level API uses IP1, IP0. 522 // Remove base and scratch form the temp list - higher level API uses IP1, IP0.
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managed_register_arm64_test.cc | 91 EXPECT_EQ(IP0, reg.AsCoreRegister()); [all...] |
/external/vixl/src/a64/ |
debugger-a64.cc | 471 { "ip0", "x16", NULL }, [all...] |
macro-assembler-a64.h | 96 sp_(sp), tmp_list_(ip0, ip1), fptmp_list_(d31) {} [all...] |
assembler-a64.h | 272 const Register ip0 = x16; [all...] |
/external/vixl/test/ |
test-assembler-a64.cc | [all...] |
/development/perftests/panorama/input/ |
test_032.ppm | [all...] |