| /external/llvm/test/CodeGen/PowerPC/ |
| vec-abi-align.ll | 34 ; CHECK: li [[REG16:[0-9]+]], 16
36 ; CHECK: lvx 2, [[REGB]], [[REG16]]
53 ; CHECK: li [[REG16:[0-9]+]], 16
55 ; CHECK: lvx 2, [[REGB]], [[REG16]]
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
| x86expr.c | 105 static int *reg16[8] = {0,0,0,0,0,0,0,0}; local
108 reg16[3] = &data->bx;
109 reg16[5] = &data->bp;
110 reg16[6] = &data->si;
111 reg16[7] = &data->di;
121 if (!reg16[*regnum])
129 return reg16[*regnum];
[all...] |
| /external/libcxxabi/src/Unwind/ |
| dwarf2.h | 172 DW_OP_reg16 = 0x60, // Contents of reg16
|
| /ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/ |
| dwarf2.h | 172 DW_OP_reg16 = 0x60, // Contents of reg16
|
| /external/elfutils/0.153/libcpu/defs/ |
| i386 | 13 %mask {reg16} 3
95 `01100011,{mod}{reg16}{r_m}:arpl {reg16},{mod}{r_m}
[all...] |
| /external/lldb/tools/debugserver/source/MacOSX/i386/ |
| DNBArchImplI386.cpp | [all...] |
| /external/lldb/tools/debugserver/source/MacOSX/x86_64/ |
| DNBArchImplX86_64.cpp | [all...] |
| /external/elfutils/0.153/src/ |
| readelf.c | [all...] |
