| /external/llvm/lib/Target/R600/ |
| R600InstrFormats.td | 93 bits<1> src0_neg;
96 let Word0{12} = src0_neg;
|
| R600ExpandSpecialInstrs.cpp | 341 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src0_neg);
|
| R600InstrInfo.cpp | [all...] |
| R600Instructions.td | 97 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
102 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
139 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
145 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
178 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, SEL:$src0_sel,
184 "$src0_neg$src0$src0_rel, "
[all...] |
| EvergreenInstructions.td | 359 let src0_neg = 0;
|
| R600ISelLowering.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_optimize.c | 567 unsigned src0_neg = inst_add->U.I.SrcReg[0].Negate & dstmask; local
582 if (inst_add->U.I.SrcReg[0].Negate && src0_neg != dstmask)
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_optimize.c | 567 unsigned src0_neg = inst_add->U.I.SrcReg[0].Negate & dstmask; local
582 if (inst_add->U.I.SrcReg[0].Negate && src0_neg != dstmask)
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600Instructions.td | 67 bits<1> SRC0_NEG = 0;
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600Instructions.td | 67 bits<1> SRC0_NEG = 0;
[all...] |
