| /external/clang/test/SemaTemplate/ |
| instantiate-subscript.cpp | 4 struct Sub0 {
24 template struct Subscript0<Sub0, int, int&>;
26 template struct Subscript0<Sub1, Sub0, long&>; // expected-note{{instantiation}}
|
| /external/chromium_org/third_party/cld/encodings/compact_lang_det/ |
| tote.cc | 55 int sub0 = ikey & 15; local
56 if (key_[sub0] == ikey) {
57 value_[sub0] += idelta;
60 int sub1 = sub0 ^ 8;
73 if (key_[sub0] == 0) {
74 alloc = sub0;
81 alloc = sub0;
171 int sub0 = ikey & 15; local
172 if (key_[sub0] == ikey) {
173 value_[sub0] += ibytes
227 int sub0 = ikey & 15; local
[all...] |
| /external/lzma/CPP/7zip/Common/ |
| FilterCoder.h | 10 #define MY_QUERYINTERFACE_ENTRY_AG(i, sub0, sub) if (iid == IID_ ## i) \
11 { if (!sub) RINOK(sub0->QueryInterface(IID_ ## i, (void **)&sub)) \
|
| /external/llvm/lib/Target/R600/ |
| SIRegisterInfo.td | 26 let SubRegIndices = [sub0, sub1];
55 def SGPR_64Regs : RegisterTuples<[sub0, sub1],
60 def SGPR_128 : RegisterTuples<[sub0, sub1, sub2, sub3],
67 def SGPR_256 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7],
78 def SGPR_512 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7,
102 def VGPR_64 : RegisterTuples<[sub0, sub1],
107 def VGPR_96 : RegisterTuples<[sub0, sub1, sub2],
113 def VGPR_128 : RegisterTuples<[sub0, sub1, sub2, sub3],
120 def VGPR_256 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7],
131 def VGPR_512 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7
[all...] |
| SIInstrInfo.cpp | 47 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
54 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
59 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, 0
63 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, 0
67 AMDGPU::sub0, AMDGPU::sub1, 0
813 if (SubIdx == AMDGPU::sub0)
846 .addImm(AMDGPU::sub0)
[all...] |
| AMDGPURegisterInfo.h | 50 /// (e.g. getSubRegFromChannel(0) -> AMDGPU::sub0)
|
| R600OptimizeVectorRegisters.cpp | 15 /// vreg5<def> = REG_SEQ vreg1, sub0, vreg2, sub1, vreg3, sub2, undef, sub3
17 /// vreg7<def> = REG_SEQ vreg1, sub0, vreg3, sub1, undef, sub2, vreg4, sub3
18 /// (swizzable Inst) vreg7, SwizzleMask : sub0, sub1, sub2, sub3
21 /// vreg5<def> = REG_SEQ vreg1, sub0, vreg2, sub1, vreg3, sub2, undef, sub3
24 /// (swizzable Inst) vreg7, SwizzleMask : sub0, sub2, sub1, sub3
|
| AMDGPURegisterInfo.cpp | 51 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, AMDGPU::sub4,
|
| R600RegisterInfo.td | 23 let SubRegIndices = [sub0, sub1, sub2, sub3];
32 let SubRegIndices = [sub0, sub1];
|
| AMDGPUISelDAGToDAG.cpp | 347 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32);
379 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32),
663 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32);
667 DL, MVT::i32, LHS, Sub0);
672 DL, MVT::i32, RHS, Sub0);
697 Sub0,
|
| SIInstructions.td | [all...] |
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 154 /// v2 = INSERT_SUBREG v1, v0, sub0
155 /// def = COPY v2.sub0
157 /// Using a ValueTracker for def = COPY v2.sub0 will give the following
159 /// v2.sub0 and v0.
843 // Def.sub0 =
845 // is a valid SSA representation for Def.sub0 and Def.sub1, but not for
848 // Def.sub0 (i.e, not defining the other subregs) and we would
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| fp-sub-01.ll | 106 %sub0 = fsub float %ret, %val0
107 %sub1 = fsub float %sub0, %val1
|
| fp-sub-02.ll | 106 %sub0 = fsub double %ret, %val0
107 %sub1 = fsub double %sub0, %val1
|
| int-sub-04.ll | 128 %sub0 = sub i64 %ret, %val0
129 %sub1 = sub i64 %sub0, %val1
|
| int-sub-01.ll | 163 %sub0 = sub i32 %ret, %val0
164 %sub1 = sub i32 %sub0, %val1
|
| int-sub-02.ll | 168 %sub0 = sub i64 %ret, %ext0
169 %sub1 = sub i64 %sub0, %ext1
|
| int-sub-03.ll | 168 %sub0 = sub i64 %ret, %ext0
169 %sub1 = sub i64 %sub0, %ext1
|
| int-sub-05.ll | 145 %sub0 = sub i128 %ret, %val0
146 %sub1 = sub i128 %sub0, %val1
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIGenRegisterInfo.pl | 33 def sub0 : SubRegIndex;
59 let SubRegIndices = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
181 my @subregs_256 = ('sub0', 'sub1', 'sub2', 'sub3', 'sub4', 'sub5', 'sub6', 'sub7');
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIGenRegisterInfo.pl | 33 def sub0 : SubRegIndex;
59 let SubRegIndices = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
181 my @subregs_256 = ('sub0', 'sub1', 'sub2', 'sub3', 'sub4', 'sub5', 'sub6', 'sub7');
|
| /external/chromium_org/third_party/icu/source/i18n/ |
| ulocdata.c | 335 static const UChar sub0[4] = { 0x007b, 0x0030, 0x007d , 0x0000 }; /* {0} */ local
373 p0=u_strstr(separator, sub0);
|
| /external/icu/icu4c/source/i18n/ |
| ulocdata.c | 335 static const UChar sub0[4] = { 0x007b, 0x0030, 0x007d , 0x0000 }; /* {0} */ local
373 p0=u_strstr(separator, sub0);
|
| /packages/providers/ContactsProvider/tests/src/com/android/providers/contacts/ |
| CallLogProviderTest.java | 185 sComponentName, "sub0");
205 values.put(Calls.PHONE_ACCOUNT_ID, "sub0");
|
| /external/chromium_org/third_party/icu/source/common/ |
| locdispnames.cpp | 469 static const UChar sub0[4] = { 0x007b, 0x0030, 0x007d , 0x0000 } ; /* {0} */ local
536 UChar *p0=u_strstr(separator, sub0);
553 UChar *p0=u_strstr(pattern, sub0);
[all...] |
