| /external/llvm/test/MC/AArch64/ |
| elf-reloc-tstb.s | 5 tbnz w3, #15, somewhere
|
| arm64-branch-encoding.s | 115 tbnz x1, #63, foo
120 tbnz w1, #31, foo
127 tbnz x3, #8, #-32768
128 ; CHECK: tbnz w3, #8, #-32768 ; encoding: [0x03,0x00,0x44,0x37]
|
| /external/llvm/test/CodeGen/AArch64/ |
| branch-relax-asm.ll | 5 ; It would be more natural to use just one "tbnz %false" here, but if the
|
| analyze-branch.ll | 149 ; CHECK: tbnz {{w[0-9]+}}, #15, [[FALSE:.LBB[0-9]+_[0-9]+]]
216 ; CHECK: tbnz {{[wx][0-9]+}}, #15, [[TRUE:.LBB[0-9]+_[0-9]+]]
|
| /external/vixl/doc/ |
| changelog.md | 31 + Added support for W register parameters to `Tbz` and `Tbnz`.
|
| supported-instructions.md | 886 ### tbnz ###
890 void tbnz(const Register& rt, unsigned bit_pos, int imm14)
893 ### tbnz ###
897 void tbnz(const Register& rt, unsigned bit_pos, Label* label)
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-branch.txt | 20 # CHECK: tbnz w11, #3, #0
58 # CHECK: tbnz w0, #1, #12
|
| /bionic/libc/arch-arm64/denver64/bionic/ |
| memset.S | 205 tbnz zva_len, #31, .Lnot_short
220 tbnz tmp1, #4, .Lnot_short
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| memset.S | 178 tbnz zva_len, #31, .Lnot_short
193 tbnz tmp1, #4, .Lnot_short
|
| /external/chromium_org/v8/src/ic/arm64/ |
| ic-arm64.cc | 139 __ Tbnz(scratch, Map::kIsAccessCheckNeeded, slow);
140 __ Tbnz(scratch, interceptor_bit, slow);
272 __ Tbnz(key, kXSignBit, slow_case);
[all...] |
| /system/core/libcutils/arch-arm64/ |
| android_memset.S | 169 tbnz tmp1, #4, .Lnot_short
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| macro-assembler-arm64.cc | 745 case reg_bit_set: Tbnz(reg, bit, label); break;
771 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) {
782 tbnz(rt, bit_pos, label);
796 tbnz(rt, bit_pos, &done);
[all...] |
| macro-assembler-arm64-inl.h | [all...] |
| code-stubs-arm64.cc | 434 __ Tbnz(right_type, MaskToBit(kIsNotStringMask), &object_test);
435 __ Tbnz(right_type, MaskToBit(kIsNotInternalizedMask), possible_strings);
436 __ Tbnz(left_type, MaskToBit(kIsNotStringMask), not_both_strings);
437 __ Tbnz(left_type, MaskToBit(kIsNotInternalizedMask), possible_strings);
[all...] |
| builtins-arm64.cc | 220 __ Tbnz(x11, MaskToBit(kIsNotStringMask), &convert_argument);
[all...] |
| disasm-arm64.cc | 717 case TBNZ: mnemonic = "tbnz"; break;
[all...] |
| assembler-arm64.cc | 1056 void Assembler::tbnz(const Register& rt, function in class:v8::internal::Assembler
1065 void Assembler::tbnz(const Register& rt, function in class:v8::internal::Assembler
[all...] |
| codegen-arm64.cc | 482 // TestAndBranchIfAnySet can emit Tbnz. Do not use it because call_runtime
|
| /external/vixl/src/a64/ |
| macro-assembler-a64.h | 76 // tbz and tbnz
[all...] |
| assembler-a64.cc | 518 void Assembler::tbnz(const Register& rt, function in class:vixl::Assembler
522 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt));
526 void Assembler::tbnz(const Register& rt, function in class:vixl::Assembler
529 tbnz(rt, bit_pos, UpdateAndGetInstructionOffsetTo(label));
[all...] |
| disasm-a64.cc | 724 case TBNZ: mnemonic = "tbnz"; break;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 153 TBNZ,
|
| AArch64BranchRelaxation.cpp | 361 // tbnz L2
|
