| /external/llvm/test/CodeGen/ARM/ |
| 2012-09-25-InlineAsmScalarToVectorConv.ll | 7 %1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, ${3:q} }", "=r,=r,=r,=r,r"(i64* undef) nounwind, !srcloc !0
|
| swift-vldm.ll | 3 ; Check that we avoid producing vldm instructions using d registers that
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/armv7/ |
| armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 140 vldm.f32 pSrc, {x1r, x1i} @// {x1r, x1i} = [pSrc, step]
142 vldm.f32 pSrc!, {x0r, x0i}
171 vldm.f32 pSrc, {x1r, x1i} @// {x1r, x1i} = [pSrc, step]
173 vldm.f32 pSrc!, {x0r, x0i}
175 vldm.f32 argTwiddle, {w1r, w1i} @// {w1r, w1i} = [argTwiddle, step]
177 vldm.f32 argTwiddle!, {w0r, w0i}
232 vldm.f32 pSrc, {x0r, x0i}
|
| armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 144 vldm.f32 pSrc, {x3r, x3i} @// data[1]
146 vldm.f32 pTwiddle, {x1r, x1i} @// coef[1]
148 vldm.f32 pTwiddle, {x2r, x2i} @// coef[2]
150 vldm.f32 pSrc, {x0r, x0i} @// data[2]
169 vldm pTwiddle, {x3r, x3i} @// coef[3]
189 vldm pSrc, {x0r, x0i} @// data[3]
212 vldm pSrc, {x0r, x0i} @// data[0]
|
| armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 91 vldm.f32 t0, {\r0, \r1}
131 vldm.f32 pSrc, {x0r, x0i} @// x0
133 vldm.f32 pSrc, {x1r, x1i} @// x2
135 vldm.f32 pSrc, {x2r, x2i} @// x4
137 vldm.f32 pSrc, {x3r, x3i} @// x6
167 vldm pSrc, {x0r, x0i} @// x1
169 vldm pSrc, {x1r, x1i} @// x3
171 vldm pSrc, {x2r, x2i} @// x5
173 vldm pSrc, {x3r, x3i} @// x7
|
| armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 112 vldm.f32 pSrc, {x0r, x0i}
114 vldm.f32 pSrc, {x1r, x1i}
116 vldm.f32 pSrc, {x2r, x2i}
118 vldm.f32 pSrc, {x3r, x3i}
|
| omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 221 vldm.f32 pSrc!, {x0r, x0i}
250 vldm.f32 pSrc, {x1r, x1i} @// {x1r, x1i} = [pSrc, step]
252 vldm.f32 pSrc!, {x0r, x0i}
254 vldm.f32 argTwiddle, {w1r, w1i} @// {w1r, w1i} = [argTwiddle, step1]
256 vldm.f32 argTwiddle!, {w0r, w0i} @// {w0r, w0i} = [argTwiddle], #8
309 vldm.f32 pSrc, {x0r, x0i}
|
| armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S | 99 vldm.f32 pSrc, {x1r, x1i}
101 vldm.f32 pSrc!, {x0r, x0i}
|
| omxSP_FFTInv_CToC_FC32_Sfs_s.S | 148 vldm.f32 pSrc, {x0r, x0i}
|
| omxSP_FFTInv_CCSToR_F32_Sfs_s.S | 194 vldm.f32 pSrc, {x0r, x0i}
|
| /external/clang/test/CodeGen/ |
| arm-asm-warn.c | 25 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"
|
| arm-asm-diag.c | 11 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm.cc | 638 // Create a function that uses vldm/vstm to move some double and
647 __ vldm(ia_w, r4, d0, d3);
648 __ vldm(ia_w, r4, d4, d7);
655 __ vldm(ia_w, r4, s0, s3);
656 __ vldm(ia_w, r4, s4, s7);
744 // Create a function that uses vldm/vstm to move some double and
753 __ vldm(ia, r4, d0, d3);
755 __ vldm(ia, r4, d4, d7);
763 __ vldm(ia, r4, s0, s3);
765 __ vldm(ia, r4, s4, s7)
[all...] |
| test-disasm-arm.cc | 560 COMPARE(vldm(ia, r1, d2, d5),
564 COMPARE(vldm(ia, r3, d0, d15),
568 COMPARE(vldm(ia, r5, s2, s5),
572 COMPARE(vldm(ia, r7, s0, s31),
660 COMPARE(vldm(ia, r3, d16, d31),
664 COMPARE(vldm(ia, r3, d23, d27),
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMScheduleA9.td | [all...] |
| ARMLoadStoreOptimizer.cpp | 50 STATISTIC(NumVLDMGened, "Number of vldm instructions generated");
435 // VLDM/VSTM do not support DB mode without also updating the base reg.
725 // vldm / vstm limit are 32 for S variants, 16 for D variants.
755 // On Swift we don't want vldm/vstm to start with a odd register num
756 // because Q register unaligned vldm/vstm need more uops.
[all...] |
| ARMBaseInstrInfo.h | 239 /// Get the number of addresses by LDM or VLDM or zero for unknown.
|
| /external/chromium_org/v8/src/arm/ |
| lithium-gap-resolver-arm.cc | 286 __ vldm(ia_w, sp, kScratchDoubleReg, kScratchDoubleReg);
|
| /external/libcxxabi/src/Unwind/ |
| UnwindRegistersRestore.S | 372 ldcl p11, cr0, [r0], {#0x20} @ vldm r0, {d16-d31}
|
| UnwindRegistersSave.S | 350 stcl p11, cr0, [r0], {#0x20} @ vldm r0, {d16-d31}
|
| /external/llvm/test/MC/ARM/ |
| single-precision-fp.s | 177 vldm r0, {d0, d1}
|
| /ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/ |
| UnwindRegistersRestore.S | 372 ldcl p11, cr0, [r0], {#0x20} @ vldm r0, {d16-d31}
|
| UnwindRegistersSave.S | 350 stcl p11, cr0, [r0], {#0x20} @ vldm r0, {d16-d31}
|
| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulateInstructionARM.h | 939 // A8.6.319 VLDM
|
| /art/compiler/dex/quick/ |
| gen_invoke.cc | [all...] |
