Lines Matching refs:s_reg
220 void Mir2Lir::ClobberSReg(int s_reg) {
221 if (s_reg != INVALID_SREG) {
222 if (kIsDebugBuild && s_reg == live_sreg_) {
227 if (info->SReg() == s_reg) {
251 int Mir2Lir::SRegToPMap(int s_reg) {
252 DCHECK_LT(s_reg, mir_graph_->GetNumSSARegs());
253 DCHECK_GE(s_reg, 0);
254 int v_reg = mir_graph_->SRegToVReg(s_reg);
272 void Mir2Lir::RecordCorePromotion(RegStorage reg, int s_reg) {
273 int p_map_idx = SRegToPMap(s_reg);
274 int v_reg = mir_graph_->SRegToVReg(s_reg);
286 RegStorage Mir2Lir::AllocPreservedCoreReg(int s_reg) {
298 RecordCorePromotion(res, s_reg);
305 void Mir2Lir::RecordFpPromotion(RegStorage reg, int s_reg) {
307 int p_map_idx = SRegToPMap(s_reg);
308 int v_reg = mir_graph_->SRegToVReg(s_reg);
320 RegStorage Mir2Lir::AllocPreservedFpReg(int s_reg) {
331 RecordFpPromotion(res, s_reg);
339 RegStorage Mir2Lir::AllocPreservedDouble(int s_reg) {
346 RegStorage Mir2Lir::AllocPreservedSingle(int s_reg) {
474 RegStorage Mir2Lir::FindLiveReg(GrowableArray<RegisterInfo*> ®s, int s_reg) {
478 if ((info->SReg() == s_reg) && info->IsLive()) {
486 RegStorage Mir2Lir::AllocLiveReg(int s_reg, int reg_class, bool wide) {
489 reg = FindLiveReg(*reg_pool_->ref_regs_, s_reg);
493 reg = FindLiveReg(wide ? reg_pool_->dp_regs_ : reg_pool_->sp_regs_, s_reg);
498 reg_pool_->core_regs_, s_reg);
500 reg = FindLiveReg(reg_pool_->core_regs_, s_reg);
506 RegStorage high_reg = FindLiveReg(reg_pool_->core_regs_, s_reg + 1);
538 ClobberSReg(s_reg);
540 ClobberSReg(s_reg + 1);
660 void Mir2Lir::NullifyRange(RegStorage reg, int s_reg) {
667 DCHECK_EQ(info->SReg(), s_reg); // Make sure we're on the same page.
826 int s_reg = loc.s_reg_low;
827 if (s_reg == INVALID_SREG) {
839 if (info_lo->IsLive() && (info_lo->SReg() == s_reg) && info_hi->IsLive() &&
840 (info_hi->SReg() == s_reg)) {
843 ClobberSReg(s_reg);
844 ClobberSReg(s_reg + 1);
845 info_lo->MarkLive(s_reg);
846 info_hi->MarkLive(s_reg + 1);
849 if (info->IsLive() && (info->SReg() == s_reg)) {
852 ClobberSReg(s_reg);
854 ClobberSReg(s_reg + 1);
856 info->MarkLive(s_reg);
1188 // ``loses'' (as STARTING_WIDE_SREG is or-ed in val1->s_reg).
1190 ? (op1->s_reg - op2->s_reg)
1197 if ((arr[i].s_reg & STARTING_WIDE_SREG) != 0) {
1198 LOG(INFO) << "s_reg[64_" << (arr[i].s_reg & ~STARTING_WIDE_SREG) << "]: " << arr[i].count;
1200 LOG(INFO) << "s_reg[32_" << arr[i].s_reg << "]: " << arr[i].count;
1241 core_regs[i].s_reg = fp_regs[i].s_reg = i;
1247 core_regs[dalvik_regs + ct_idx].s_reg = ct->s_reg_low;
1248 fp_regs[dalvik_regs + ct_idx].s_reg = ct->s_reg_low;
1253 fp_regs[i].s_reg = fp_regs[i - num_regs].s_reg | STARTING_WIDE_SREG;
1256 core_regs[i].s_reg = core_regs[i - num_regs].s_reg | STARTING_WIDE_SREG;
1274 int low_sreg = fp_regs[i].s_reg & ~STARTING_WIDE_SREG;
1280 bool wide = fp_regs[i].s_reg & STARTING_WIDE_SREG;
1303 int low_sreg = core_regs[i].s_reg & ~STARTING_WIDE_SREG;
1362 int Mir2Lir::SRegOffset(int s_reg) {
1363 return VRegOffset(mir_graph_->SRegToVReg(s_reg));
1411 * Get the "real" sreg number associated with an s_reg slot. In general,
1412 * s_reg values passed through codegen are the SSA names created by
1423 bool Mir2Lir::LiveOut(int s_reg) {
