Lines Matching refs:MipsAssembler
36 void MipsAssembler::Emit(int32_t value) {
41 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {
54 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
64 void MipsAssembler::EmitJ(int opcode, int address) {
70 void MipsAssembler::EmitFR(int opcode, int fmt, FRegister ft, FRegister fs, FRegister fd, int funct) {
83 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm) {
92 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) {
108 void MipsAssembler::EmitJump(Label* label, bool link) {
124 int32_t MipsAssembler::EncodeBranchOffset(int offset, int32_t inst, bool is_jump) {
139 int MipsAssembler::DecodeBranchOffset(int32_t inst, bool is_jump) {
148 void MipsAssembler::Bind(Label* label, bool is_jump) {
155 int32_t encoded = MipsAssembler::EncodeBranchOffset(offset, next, is_jump);
157 label->position_ = MipsAssembler::DecodeBranchOffset(next, is_jump);
162 void MipsAssembler::Add(Register rd, Register rs, Register rt) {
166 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
170 void MipsAssembler::Addi(Register rt, Register rs, uint16_t imm16) {
174 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
178 void MipsAssembler::Sub(Register rd, Register rs, Register rt) {
182 void MipsAssembler::Subu(Register rd, Register rs, Register rt) {
186 void MipsAssembler::Mult(Register rs, Register rt) {
190 void MipsAssembler::Multu(Register rs, Register rt) {
194 void MipsAssembler::Div(Register rs, Register rt) {
198 void MipsAssembler::Divu(Register rs, Register rt) {
202 void MipsAssembler::And(Register rd, Register rs, Register rt) {
206 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
210 void MipsAssembler::Or(Register rd, Register rs, Register rt) {
214 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
218 void MipsAssembler::Xor(Register rd, Register rs, Register rt) {
222 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
226 void MipsAssembler::Nor(Register rd, Register rs, Register rt) {
230 void MipsAssembler::Sll(Register rd, Register rs, int shamt) {
234 void MipsAssembler::Srl(Register rd, Register rs, int shamt) {
238 void MipsAssembler::Sra(Register rd, Register rs, int shamt) {
242 void MipsAssembler::Sllv(Register rd, Register rs, Register rt) {
246 void MipsAssembler::Srlv(Register rd, Register rs, Register rt) {
250 void MipsAssembler::Srav(Register rd, Register rs, Register rt) {
254 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) {
258 void MipsAssembler::Lh(Register rt, Register rs, uint16_t imm16) {
262 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) {
266 void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) {
270 void MipsAssembler::Lhu(Register rt, Register rs, uint16_t imm16) {
274 void MipsAssembler::Lui(Register rt, uint16_t imm16) {
278 void MipsAssembler::Mfhi(Register rd) {
282 void MipsAssembler::Mflo(Register rd) {
286 void MipsAssembler::Sb(Register rt, Register rs, uint16_t imm16) {
290 void MipsAssembler::Sh(Register rt, Register rs, uint16_t imm16) {
294 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) {
298 void MipsAssembler::Slt(Register rd, Register rs, Register rt) {
302 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
306 void MipsAssembler::Slti(Register rt, Register rs, uint16_t imm16) {
310 void MipsAssembler::Sltiu(Register rt, Register rs, uint16_t imm16) {
314 void MipsAssembler::Beq(Register rt, Register rs, uint16_t imm16) {
319 void MipsAssembler::Bne(Register rt, Register rs, uint16_t imm16) {
324 void MipsAssembler::J(uint32_t address) {
329 void MipsAssembler::Jal(uint32_t address) {
334 void MipsAssembler::Jr(Register rs) {
339 void MipsAssembler::Jalr(Register rs) {
344 void MipsAssembler::AddS(FRegister fd, FRegister fs, FRegister ft) {
348 void MipsAssembler::SubS(FRegister fd, FRegister fs, FRegister ft) {
352 void MipsAssembler::MulS(FRegister fd, FRegister fs, FRegister ft) {
356 void MipsAssembler::DivS(FRegister fd, FRegister fs, FRegister ft) {
360 void MipsAssembler::AddD(DRegister fd, DRegister fs, DRegister ft) {
365 void MipsAssembler::SubD(DRegister fd, DRegister fs, DRegister ft) {
370 void MipsAssembler::MulD(DRegister fd, DRegister fs, DRegister ft) {
375 void MipsAssembler::DivD(DRegister fd, DRegister fs, DRegister ft) {
380 void MipsAssembler::MovS(FRegister fd, FRegister fs) {
384 void MipsAssembler::MovD(DRegister fd, DRegister fs) {
389 void MipsAssembler::Mfc1(Register rt, FRegister fs) {
393 void MipsAssembler::Mtc1(FRegister ft, Register rs) {
397 void MipsAssembler::Lwc1(FRegister ft, Register rs, uint16_t imm16) {
401 void MipsAssembler::Ldc1(DRegister ft, Register rs, uint16_t imm16) {
405 void MipsAssembler::Swc1(FRegister ft, Register rs, uint16_t imm16) {
409 void MipsAssembler::Sdc1(DRegister ft, Register rs, uint16_t imm16) {
413 void MipsAssembler::Break() {
418 void MipsAssembler::Nop() {
422 void MipsAssembler::Move(Register rt, Register rs) {
426 void MipsAssembler::Clear(Register rt) {
430 void MipsAssembler::Not(Register rt, Register rs) {
434 void MipsAssembler::Mul(Register rd, Register rs, Register rt) {
439 void MipsAssembler::Div(Register rd, Register rs, Register rt) {
444 void MipsAssembler::Rem(Register rd, Register rs, Register rt) {
449 void MipsAssembler::AddConstant(Register rt, Register rs, int32_t value) {
453 void MipsAssembler::LoadImmediate(Register rt, int32_t value) {
457 void MipsAssembler::EmitLoad(ManagedRegister m_dst, Register src_register, int32_t src_offset,
477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base,
503 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) {
507 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) {
511 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base,
531 void MipsAssembler::StoreFToOffset(FRegister reg, Register base, int32_t offset) {
535 void MipsAssembler::StoreDToOffset(DRegister reg, Register base, int32_t offset) {
541 void MipsAssembler::BuildFrame(size_t frame_size, ManagedRegister method_reg,
568 void MipsAssembler::RemoveFrame(size_t frame_size,
588 void MipsAssembler::IncreaseFrameSize(size_t adjust) {
593 void MipsAssembler::DecreaseFrameSize(size_t adjust) {
598 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) {
618 void MipsAssembler::StoreRef(FrameOffset dest, ManagedRegister msrc) {
624 void MipsAssembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) {
630 void MipsAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm,
638 void MipsAssembler::StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm,
646 void MipsAssembler::StoreStackOffsetToThread32(ThreadOffset<4> thr_offs,
656 void MipsAssembler::StoreStackPointerToThread32(ThreadOffset<4> thr_offs) {
660 void MipsAssembler::StoreSpanning(FrameOffset dest, ManagedRegister msrc,
669 void MipsAssembler::Load(ManagedRegister mdest, FrameOffset src, size_t size) {
673 void MipsAssembler::LoadFromThread32(ManagedRegister mdest, ThreadOffset<4> src, size_t size) {
677 void MipsAssembler::LoadRef(ManagedRegister mdest, FrameOffset src) {
683 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base,
694 void MipsAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base,
702 void MipsAssembler::LoadRawPtrFromThread32(ManagedRegister mdest,
709 void MipsAssembler::SignExtend(ManagedRegister /*mreg*/, size_t /*size*/) {
713 void MipsAssembler::ZeroExtend(ManagedRegister /*mreg*/, size_t /*size*/) {
717 void MipsAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t /*size*/) {
745 void MipsAssembler::CopyRef(FrameOffset dest, FrameOffset src,
753 void MipsAssembler::CopyRawPtrFromThread32(FrameOffset fr_offs,
764 void MipsAssembler::CopyRawPtrToThread32(ThreadOffset<4> thr_offs,
775 void MipsAssembler::Copy(FrameOffset dest, FrameOffset src,
791 void MipsAssembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset,
799 void MipsAssembler::Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src,
807 void MipsAssembler::Copy(FrameOffset /*dest*/, FrameOffset /*src_base*/, Offset /*src_offset*/,
812 void MipsAssembler::Copy(ManagedRegister dest, Offset dest_offset,
821 void MipsAssembler::Copy(FrameOffset /*dest*/, Offset /*dest_offset*/, FrameOffset /*src*/, Offset /*src_offset*/,
826 void MipsAssembler::MemoryBarrier(ManagedRegister) {
830 void MipsAssembler::CreateHandleScopeEntry(ManagedRegister mout_reg,
858 void MipsAssembler::CreateHandleScopeEntry(FrameOffset out_off,
881 void MipsAssembler::LoadReferenceFromHandleScope(ManagedRegister mout_reg,
897 void MipsAssembler::VerifyObject(ManagedRegister /*src*/, bool /*could_be_null*/) {
901 void MipsAssembler::VerifyObject(FrameOffset /*src*/, bool /*could_be_null*/) {
905 void MipsAssembler::Call(ManagedRegister mbase, Offset offset, ManagedRegister mscratch) {
916 void MipsAssembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) {
928 void MipsAssembler::CallFromThread32(ThreadOffset<4> /*offset*/, ManagedRegister /*mscratch*/) {
932 void MipsAssembler::GetCurrentThread(ManagedRegister tr) {
936 void MipsAssembler::GetCurrentThread(FrameOffset offset,
941 void MipsAssembler::ExceptionPoll(ManagedRegister mscratch, size_t stack_adjust) {
951 MipsAssembler* sp_asm = down_cast<MipsAssembler*>(sasm);
